MAX191BCWG+ Maxim Integrated Products, MAX191BCWG+ Datasheet - Page 13

• Manufacturer Part Number: MAX191BCWG+
• Description: IC ADC 12BIT 100KSPS W/REF24SOIC
• Manufacturer: Maxim Integrated Products

Specifications of MAX191BCWG+

• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Data Interface: MICROWIRE™, Parallel, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 941mW
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Number Of Adc Inputs: 1
• Architecture: SAR
• Conversion Rate: 100 KSPs
• Resolution: 12 bit
• Input Type: Differential
• Interface Type: 3-Wire (SPI, QSPI, MICROWIRE)
• Supply Voltage (max): 5 V
• Maximum Power Dissipation: 1067 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. Data-Bus Output,
Table 2. Slow-Memory Mode, 2-Byte Read Data-Bus Status
Table 3. ROM Mode, 2-Byte Read Data-Bus Status
Table 4. ROM Mode, 2-Byte Read Data-Bus Status without Starting a Conversion Cycle
Note:
HBEN = 0, PAR = 1,
PARALLEL MODE
HBEN = 1, PAR = 1,
PARALLEL MODE
HBEN = X, PAR = 0,
SERIAL MODE, RD = 0
HBEN = X, PAR = 0,
SERIAL MODE, RD = 1
FIRST READ (New Data)
SECOND READ (New Data)
FIRST READ (Old Data)
SECOND READ (New Data)
THIRD READ (New Data)
FIRST READ (Old Data)
SECOND READ (New Data)
THIRD READ (New Data)
PIN NAME
D7/DOUT–D0/D8 are the ADC data output pins.
D11–D0 are the 12-bit conversion results. D11 is the MSB.
DOUT = Three-state data output. Data output in serial mode.
SCLK
SSTRB = Three-state data output. Strobe output in serial mode.
PIN NAME
PIN NAME
PIN NAME
OUT
with Internal Reference and Power-Down
= Three-state data output. Clock output in serial mode.
______________________________________________________________________________________
D7/DOUT
DOUT
DOUT
Low
D7/DOUT
D7/DOUT
D7/DOUT
D7
Low
Low
Low
D7
D7
D7
D7
D7
CS = RD = Low
Low-Power, 12-Bit Sampling ADC
D6/SCLK
SCLK
D6/SCLK
D6/SCLK
D6/SCLK
Three-
Stated
Low
D6
OUT
Low
Low
Low
D6
D6
D6
D6
D6
OUT
OUT
OUT
OUT
D5/SSTRB
SSTRB
Three-
Stated
D5/SSTRB
D5/SSTRB
D5/SSTRB
Low
D5
Low
Low
Low
D5
D5
D5
D5
D5
Low
Low
Low
D4
D4
Low
Low
Low
D4
D4
D4
D4
D4
D4
D4
D4
D3/D11
D11
Low
Low
D3/D11
D3/D11
D3/D11
D3
D11
D11
D11
D3
D3
D3
D3
D3
D2/D10
D2/D10
D2/D10
D2/D10
D10
Low
Low
D2
D10
D10
D10
D2
D2
D2
D2
D2
D1/D9
D1/D9
D1/D9
D1/D9
Low
Low
D1
D9
D1
D9
D1
D9
D1
D1
D1
D9
D0/D8
D0/D8
D0/D8
D0/D8
Low
Low
D0
D8
D0
D8
D0
D8
D0
D0
D0
D8
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