IDT82V3255TFG IDT, Integrated Device Technology Inc, IDT82V3255TFG Datasheet - Page 125

• Manufacturer Part Number: IDT82V3255TFG
• Description: IC PLL WAN SMC STRATUM 3 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3255TFG

• Input: CMOS, LVDS, PECL
• Output: CMOS, LVDS, PECL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3255TFG

A
Averaged Phase Error ........................................................................ 31
B
Bandwidths and Damping Factors ..................................................... 31
C
Calibration .......................................................................................... 17
Coarse Phase Loss ............................................................................ 24
Crystal Oscillator ................................................................................ 17
Current Frequency Offset ................................................................... 31
D
DCO ................................................................................................... 31
Division Factor .................................................................................... 19
DPLL Hard Alarm ............................................................................... 24
DPLL Hard Limit ................................................................................. 24
DPLL Operating Mode ................................................................. 31
DPLL Soft Alarm ................................................................................. 24
DPLL Soft Limit .................................................................................. 24
E
External Sync Alarm ........................................................................... 38
F
Fast Loss ............................................................................................ 24
Fine Phase Loss ................................................................................. 24
Index
Acquisition Bandwidth and Damping Factor ............................... 31
Locked Bandwidth and Damping Factor ..................................... 31
Starting Bandwidth and Damping Factor .................................... 31
Free-Run mode ................................................................... 31
Holdover mode .................................................................... 31
Locked mode ....................................................................... 31
Lost-Phase mode ....................................................................... 31
Pre-Locked mode ....................................................................... 31
Pre-Locked2 mode ..................................................................... 32
Automatic Fast Averaged ................................................... 32
Automatic Instantaneous .................................................... 32
Automatic Slow Averaged .................................................. 32
Manual ................................................................................ 32
Temp-Holdover mode ......................................................... 31
,
,
,
,
32
32
32
32
125
Frequency Hard Alarm .................................................................21
Frequency Hard Alarm Threshold ...................................................... 21
H
Hard Limit ........................................................................................... 24
Holdover Frequency Offset ................................................................ 32
I
IIR ...................................................................................................... 32
Input Clock Frequency ....................................................................... 21
Input Clock Selection ......................................................................... 22
Internal Leaky Bucket Accumulator ................................................... 20
L
Limit ................................................................................................... 34
LPF .................................................................................................... 31
M
Master Clock ...................................................................................... 17
Microprocessor Interface ................................................................... 43
N
No-activity Alarm ..........................................................................20
P
PBO ................................................................................................... 34
PFD .................................................................................................... 31
Phase Lock Alarm ........................................................................25
Phase Offset ...................................................................................... 34
Phase-compared ..........................................................................24
Phase-time ......................................................................................... 34
Pre-Divider ......................................................................................... 19
Automatic selection ..............................................................23
External Fast selection .........................................................22
Forced selection ...................................................................23
Bucket Size ................................................................................ 20
Decay Rate ................................................................................ 20
Lower Threshold ........................................................................ 20
Upper Threshold ........................................................................ 20
DivN Divider ............................................................................... 19
December 3, 2008
Index
,
,
,
,
,
,
,
26
26
26
26
26
26
34