MT49H64M9CHT-25:A Micron Technology Inc, MT49H64M9CHT-25:A Datasheet - Page 35

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MT49H64M9CHT-25:A

Manufacturer Part Number
MT49H64M9CHT-25:A
Description
Manufacturer
Micron Technology Inc
Type
RLDRAMr
Datasheet

Specifications of MT49H64M9CHT-25:A

Organization
64Mx9
Address Bus
25b
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
675mA
Pin Count
144
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Figure 12:
Table 19:
Address Multiplexing
PDF: 09005aef815b2df8/Source: 09005aef811ba111
576Mb_RLDRAM_II_SIO_Core2.fm - Rev. F 6/09 EN
COMMAND
ADDRESS
QVLD
QVLD
QVLD
QK#
QK#
QK#
CK#
QK
QK
QK
CK
Q
Q
Q
Address Widths at Different Burst Lengths
Read Burst Lengths
Bank a,
READ
Col n
T0
Notes:
1. DO an = data-out from bank a and address n.
2. Subsequent elements of data-out appear after DO n.
3. Shown with nominal
Although the RLDRAM has the ability to operate with an SRAM interface by accepting
the entire address in one clock, an option in the mode register can be set so that it func-
tions with multiplexed addresses, similar to a traditional DRAM. In multiplexed address
mode, the address can be provided to the RLDRAM in two parts that are latched into the
memory with two consecutive rising clock edges. This provides the advantage of only
needing a maximum of 11 address balls to control the RLDRAM, reducing the number of
signals on the controller side. The data bus efficiency in continuous burst mode is only
NOP
T1
RL = 4
Burst Length
2
4
8
NOP
576Mb: x9, x18 2.5V Vext, 1.8V Vdd, HSTL, SIO, RLDRAM II
T2
t
CKQK.
T3
NOP
35
T4
NOP
A0–A21
A0–A20
A0–A19
DO
Micron Technology, Inc., reserves the right to change products or specifications without notice.
an
DO
DO
an
an
x9
T4n
T5
NOP
Configuration
T5n
TRANSITIONING DATA
T6
NOP
©2004 Micron Technology, Inc. All rights reserved.
T6n
A0–A20
A0–A19
A0–A18
x18
T7
NOP
Commands
DON’T CARE
T7n
NOP

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