FWLXT9784BE.A3 Cortina Systems Inc, FWLXT9784BE.A3 Datasheet - Page 66

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FWLXT9784BE.A3

Manufacturer Part Number
FWLXT9784BE.A3
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of FWLXT9784BE.A3

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FWLXT9784BE.A3
Manufacturer:
Intel
Quantity:
25
Part Number:
FWLXT9784BE.A3
Manufacturer:
Intel
Quantity:
10 000
LXT9784 — Low-Power Octal PHY
66
20[15:0]
21[15:0]
22[15:0]
23[15:0]
24[15:0]
25[15:0]
1. RO = Read Only; SC = Self Cleared.
1. RO = Read Only; SC = Self Cleared.
1. RO = Read Only; SC = Self Cleared.
1. RO = Read Only; SC = Self Cleared.
1. RO = Read Only; SC = Self Cleared.
1. RO = Read Only; SC = Self Cleared.
Bit(s)
Bit(s)
Bit(s)
Bit(s)
Bit(s)
Bit(s)
Table 54. Reg 20 (14 Hex) 100BASETx Receive Disconnect Counter
Table 55. Reg 21 (15 Hex) 100BASETx Receive Error Frame Counter
Table 56. Reg 22 (16 Hex) Receive Symbol Error Counter
Table 57. Reg 23 (17 Hex) 100BASETx Receive Premature End of Frame Error Counter
Table 58. Reg 24 (18 Hex) 10BASET Receive End of Frame Error Counter
Table 59. Reg 25 (19 Hex) 10BASET Transmit Jabber Detect Counter
Disconnect
Event
Receive Error
Frame
Symbol Error
Counter
Premature End
of Frame
End of Frame
Counter
Jabber detect
counter
Name
Name
Name
Name
Name
Name
A 16 bit counter that increments for each disconnect event. The counter stops when
full (and does not roll over). Self clears on read.
Two or more consecutive False carrier events causes this counter to increment.
A 16-bit counter that increments for each symbol error. The counter stops when full
(and does not roll over). Self clears on read.
A 16-bit counter that increments for each premature end of frame event. The counter
stops when full (and does not roll over). Self clears on read.
A frame without a “TR” at the end is considered a premature end of frame event.
A 16-bit counter which increments for each end of frame error event. The counter
stops when full (and does not roll over). Self clears on read.
A 16-bit counter which increments for each jabber detection event. The counter stops
when full (and does not roll over). Self clears on read.
A 16 bit counter that increments once per frame for any receive error condition, such
as a symbol error or premature end of frame, in that frame. The counter stops when
full (and does not roll over). Self clears on read.
Description
Description
Description
Description
Description
Description
Datasheet
Type
Type
Type
Type
Type
Type
RO
RO
RO
RO
RO
RO
SC
SC
SC
SC
SC
SC
1
1
1
1
1
1

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