HBLXT9761HC.C4 Intel, HBLXT9761HC.C4 Datasheet - Page 34
HBLXT9761HC.C4
Manufacturer Part Number
HBLXT9761HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9761HC.C4.pdf
(78 pages)
Specifications of HBLXT9761HC.C4
Lead Free Status / RoHS Status
Not Compliant
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LXT9761/9781 — Fast Ethernet 10/100 Multi-Port Transceiver with RMII
34
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs; /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs; /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
Code Type
Figure 16. Protocol Sublayers
Table 10. 4B/5B Coding
DATA
Sublayer
Sublayer
Sublayer
PMD
PMA
PCS
4B Code
0 1 1 1
3 2 1 0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
LXT97x1
Name
De-scrambler
C
D
0
1
2
3
4
5
6
7
8
9
A
B
E
F
Scrambler/
100BASE-TX
Serializer/De-serializer
Link/Carrier Detect
Encoder/Decoder
5B Code
4 3 2 1 0
1 1 1 1 0
0 1 0 0 1
1 0 1 0 0
1 0 1 0 1
0 1 0 1 0
0 1 0 1 1
0 1 1 1 0
0 1 1 1 1
1 0 0 1 0
1 0 0 1 1
1 0 1 1 0
1 0 1 1 1
1 1 0 1 0
1 1 0 1 1
1 1 1 0 0
1 1 1 0 1
MII Interface
Fiber Transceiver
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Data 9
Data A
Data B
Data C
Data D
Data E
Data F
100BASE-FX
PECL Interface
Interpretation
Datasheet
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