HBLXT9761HC.C4 Intel, HBLXT9761HC.C4 Datasheet - Page 33

• Manufacturer Part Number: HBLXT9761HC.C4
• Manufacturer: Intel

Specifications of HBLXT9761HC.C4

• Lead Free Status / RoHS Status: Not Compliant

2.7.2
2.7.2.1
Datasheet
Replaced by
/J/K/ code-groups
Start-of-Stream
Delimiter (SSD)
P0
Figure 15. 100BASE-X Frame Format
64-Bit Preamble
P1
(8 Octets)
100BASE-X Protocol Sublayer Operations
With respect to the 7-layer communications model, the LXT97x1 is a Physical Layer 1 (PHY)
device. The LXT97x1 implements the Physical Coding Sublayer (PCS), Physical Medium
Attachment (PMA), and Physical Medium Dependent (PMD) sublayers of the reference model
defined by the IEEE 802.3u specification. The following paragraphs discuss LXT97x1 operation
from the reference model point of view.
PCS Sublayer
The Physical Coding Sublayer (PCS) provides the RMII interface, as well as the 4B/5B encoding/
decoding function.
For 100TX and 100FX operation, the PCS layer provides IDLE symbols to the PMD-layer line
driver as long as TXEN is de-asserted.
For 10T operation, the PCS layer merely provides a bus interface and serialization/de-serialization
function. 10T operation does not use the 4B/5B encoder.
Preamble Handling
When the MAC asserts TXEN, the PCS substitutes a /J/K symbol pair, also known as the Start of
Stream Delimiter (SSD), for the first two nibbles received across the RMII. The PCS layer
continues to encode the remaining RMII data, following
asserted. It then returns to supplying IDLE symbols to the line driver.
In the receive direction, the PCS layer performs the opposite function, substituting two preamble
nibbles for the SSD.
Dribble Bits
The LXT97x1 handles dribbles bits in all modes. If between 1-4 dribble bits are received, the
nibble will be passed across the RMII. If between 5-7 dribble bits are received, the second nibble
will not be sent onto the RMII bus.
P6
Delimiter (SFD)
Start-of-Frame
SFD
DA
Fast Ethernet 10/100 Multi-Port Transceiver with RMII — LXT9761/9781
Address (6 Octets each)
Destination and Source
DA
SA
SA
Packet Length
L1
(2 Octets)
L2
(Pad to minimum packet size)
D0
Data Field
D1
Table 10 on page
Dn
Frame Check Field
(4 Octets)
CRC
End-of-Stream Delimiter (ESD)
34, until TXEN is de-
/T/R/ code-groups
Replaced by
InterFrame Gap / Idle Code
I0
(> 12 Octets)
IFG
33