DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 451

• Manufacturer Part Number: DSPIC33EP512MU810T-I/PT
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 30-2:
 2009-2011 Microchip Technology Inc.
Base
46
47
48
49
50
51
52
Note
Instr
#
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
MOV
MOVPAG
MOVSAC
MPY
MPY.N
MSC
MUL
Mnemonic
Assembly
1:
2:
This instruction is available in dsPIC33EPXXXMU806/810/814 devices only.
Read and Read-Modify-Write (e.g., bit operations and logical operations) on non-CPU SFRs incur an additional instruction cycle.
MOV
MOV
MOV
MOV
MOV.b
MOV
MOV
MOV
MOV.D
MOV.D
MOVPAG
MOVPAG
MOVPAG
MOVPAGW Ws, DSRPAG
MOVPAGW Ws, DSWPAG
MOVPAGW Ws, TBLPAG
MOVSAC
MPY
MPY
MPY.N
MSC
MUL.SS
MUL.SS
MUL.SU
MUL.SU
MUL.SU
MUL.US
MUL.US
MUL.UU
MUL.UU
MUL.UU
MULW.SS Wb,Ws,Wnd
MULW.SU Wb,Ws,Wnd
MULW.US Wb,Ws,Wnd
MULW.UU Wb,Ws,Wnd
MUL.SU
MUL.SU
MUL.UU
MUL.UU
MUL
INSTRUCTION SET OVERVIEW (CONTINUED)
f,Wn
f
f,WREG
#lit16,Wn
#lit8,Wn
Wn,f
Wso,Wdo
WREG,f
#lit10,DSRPAG
#lit9,DSWPAG
#lit8,TBLPAG
Acc,Wx,Wxd,Wy,Wyd,AWB
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd,AWB
Wb,Ws,Wnd
Wb,Ws,Acc
Wb,Ws,Wnd
Wb,Ws,Acc
Wb,#lit5,Acc
Wb,Ws,Wnd
Wb,Ws,Acc
Wb,Ws,Wnd
Wb,#lit5,Acc
Wb,Ws,Acc
Wb,#lit5,Wnd
Wb,#lit5,Wnd
Wb,#lit5,Wnd
Wb,#lit5,Wnd
f
Wns,Wd
Ws,Wnd
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd
Assembly Syntax
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Preliminary
(1)
Move f to Wn
Move f to f
Move f to WREG
Move 16-bit literal to Wn
Move 8-bit literal to Wn
Move Wn to f
Move Ws to Wd
Move WREG to f
Move Double from W(ns):W(ns + 1) to Wd
Move Double from Ws to W(nd + 1):W(nd)
Move 10-bit literal to DSRPAG
Move 9-bit literal to DSWPAG
Move 8-bit literal to TBLPAG
Move Ws<9:0> to DSRPAG
Move Ws<8:0> to DSWPAG
Move Ws<7:0> to TBLPAG
Prefetch and store accumulator
Multiply Wm by Wn to Accumulator
Square Wm to Accumulator
-(Multiply Wm by Wn) to Accumulator
Multiply and Subtract from Accumulator
{Wnd + 1, Wnd} = signed(Wb) *
signed(Ws)
Accumulator = signed(Wb) * signed(Ws)
{Wnd + 1, Wnd} = signed(Wb) *
unsigned(Ws)
Accumulator = signed(Wb) *
unsigned(Ws)
Accumulator = signed(Wb) *
unsigned(lit5)
{Wnd + 1, Wnd} = unsigned(Wb) *
signed(Ws)
Accumulator = unsigned(Wb) *
signed(Ws)
{Wnd + 1, Wnd} = unsigned(Wb) *
unsigned(Ws)
Accumulator = unsigned(Wb) *
unsigned(lit5)
Accumulator = unsigned(Wb) *
unsigned(Ws)
Wnd = signed(Wb) * signed(Ws)
Wnd = signed(Wb) * unsigned(Ws)
Wnd = unsigned(Wb) * signed(Ws)
Wnd = unsigned(Wb) * unsigned(Ws)
{Wnd + 1, Wnd} = signed(Wb) *
unsigned(lit5)
Wnd = signed(Wb) * unsigned(lit5)
{Wnd + 1, Wnd} = unsigned(Wb) *
unsigned(lit5)
Wnd = unsigned(Wb) * unsigned(lit5)
W3:W2 = f * WREG
Description
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
# of
DS70616E-page 451
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(2)
Status Flags
OA,OB,OAB,
OA,OB,OAB,
OA,OB,OAB,
SA,SB,SAB
SA,SB,SAB
SA,SB,SAB
Affected
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None