DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 280

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DSPIC33EP512MU810T-I/PT

Manufacturer Part Number
DSPIC33EP512MU810T-I/PT
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 16-12: PDCx: PWM GENERATOR DUTY CYCLE REGISTER
REGISTER 16-13: SDCx: PWM SECONDARY DUTY CYCLE REGISTER
DS70616E-page 280
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note:
Note:
R/W-0
R/W-0
R/W-0
R/W-0
In Independent PWM mode, the PDCx register controls the PWMxH duty cycle only. In the Complementary,
Redundant and Push-Pull PWM modes, the PDCx register controls the duty cycle of both the PWMxH and
PWMxL.
The SDCx register is used in Independent PWM mode only. When used in Independent PWM mode, the
SDCx register controls the PWMxL duty cycle.
PDCx<15:0>: PWM Generator # Duty Cycle Value bits
SDCx<15:0>: Secondary Duty Cycle bits for PWMxL Output Pin
R/W-0
R/W-0
R/W-0
R/W-0
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
PDCx<15:8>
SDCx<15:8>
PDCx<7:0>
SDCx<7:0>
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0

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