A2F200M3F-1FGG484 Actel, A2F200M3F-1FGG484 Datasheet - Page 54

• Manufacturer Part Number: A2F200M3F-1FGG484
• Description: FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
• Manufacturer: Actel

Specifications of A2F200M3F-1FGG484

• Processor Series: A2F200
• Core: ARM Cortex M3
• Number Of Logic Blocks: 8
• Maximum Operating Frequency: 120 MHz
• Number Of Programmable I/os: 161
• Data Ram Size: 4608 bit
• Delay Time: 200 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 1 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 200000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SmartFusion DC and Switching Characteristics
Figure 2-12 • B-LVDS/M-LVDS Multipoint Application Using LVDS I/O Buffers
2- 42
R
T
Z
Z
Z
stub
0
0
Receiver
+
R
R
S
B-LVDS/M-LVDS
Bus LVDS (B-LVDS) and Multipoint LVDS (M-LVDS) specifications extend the existing LVDS standard to
high-performance multipoint bus applications. Multidrop and multipoint bus configurations may contain
any combination of drivers, receivers, and transceivers. SoC Products Group LVDS drivers provide the
higher drive current required by B-LVDS and M-LVDS to accommodate the loading. The drivers require
series terminations for better signal quality and to control voltage swing. Termination is also required at
both ends of the bus since the driver can be located anywhere on the bus. These configurations can be
implemented using the TRIBUF_LVDS and BIBUF_LVDS macros along with appropriate terminations.
Multipoint designs using SoC Products Group LVDS macros can achieve up to 200 MHz with a maximum
of 20 loads. A sample application is given in
in the LVDS section in
Example: For a bus consisting of 20 equidistant loads, the following terminations provide the required
differential voltage, in worst-case commercial operating conditions, at the farthest receiver: R
and R
-
EN
R
Z
S
stub
T
= 70 Ω, given Z
Z
Z
Z
0
0
stub
Transceiver
+
R
T
S
-
EN
R
Z
stub
S
Table
0
= 50 Ω (2") and Z
Z
Z
2-64.
Z
0
0
stub
Driver
+
R
D
S
-
EN
R
Z
S
stub
stub
Figure
R e visio n 6
= 50 Ω (~1.5").
Z
Z
Z
0
0
stub
2-12. The input and output buffer delays are available
Receiver
+
R
R
S
-
EN
R
Z
S
stub
...
Z
Z
0
0
Transceiver
+
R
T
S
-
EN
R
S
BIBUF_LVDS
Z
Z
0
0
S
= 60 Ω
R
T