A2F200M3F-1FGG484 Actel, A2F200M3F-1FGG484 Datasheet - Page 188

FPGA - Field Programmable Gate Array 200K System Gates SmartFusion

A2F200M3F-1FGG484

Manufacturer Part Number
A2F200M3F-1FGG484
Description
FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
Manufacturer
Actel
Datasheet

Specifications of A2F200M3F-1FGG484

Processor Series
A2F200
Core
ARM Cortex M3
Number Of Logic Blocks
8
Maximum Operating Frequency
120 MHz
Number Of Programmable I/os
161
Data Ram Size
4608 bit
Delay Time
200 ns
Supply Voltage (max)
3.6 V
Supply Current
1 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
200000
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Datasheet Information
6 - 6
Revision
Revision 0
(continued)
Table 2-1 • Absolute Maximum
Table 2-3 • Recommended Operating Conditions
Device names were updated in
Table 2-8 • Quiescent Supply Current Characteristics
Table 2-10 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software
Settings
Removed "Example of Power Calculation."
Table 2-13 • Different Components Contributing to Dynamic Power Consumption in
SmartFusion Devices
Table 2-14 • Different Components Contributing to the Static Power Consumption in
SmartFusion Devices
The
Table 2-81 • Electrical Characteristics of the RC Oscillator
Table 2-83 • Electrical Characteristics of the Low Power Oscillator
extensively.
The parameter t
The 12-bit mode row for integral non-linearity was removed from
Specifications. The typical value for 10-bit mode was revised. The table note was
punctuated correctly to make it clear.
Figure 37-34 • Write Access after Write onto Same Address, Figure 37-34 • Read
Access after Write onto Same Address, and Figure 37-34 • Write Access after Read
onto Same Address
Table 2-97 • Voltage Regulator
The
Circuit (I
"SmartFusion Development Tools" section
The pin description tables were revised by adding additional pins to reflect the pinout
for A2F500.
The descriptions for
The description for
The pin tables for the
that compare pin functions across densities for each package.
"Power Calculation Methodology" section
"Serial Peripheral Interface (SPI) Characteristics" section
2
was revised extensively.
C) Characteristics" section
RSTBQ
"VCC33A"
were deleted.
"GNDSDD1"
was revised extensively.
was revised extensively.
"256-Pin FBGA"
was changed to T
was revised.
was revised extensively.
Table 2-6 • Package Thermal
Ratings,
and
are new.
"VCC33SDD1"
Changes
R e vi s i o n 6
and
C2CWRH
Table 2-2 • Analog Maximum
was replaced with new content.
"484-Pin FBGA"
was revised.
were revised extensively.
in
Table 2-85 •
was revised extensively.
were revised.
was revised extensively.
were replaced with tables
Resistance.
RAM4K9.
and
Table 2-93 • ADC
"Inter-Integrated
Ratings, and
was revised
5-1,
through
through
2-86,
Page
2-10
2-11
2-12
2-13
2-14
2-61
2-62
2-68
2-77
2-84
2-88
5-14
5-40
N/A
N/A
2-1
2-3
2-7
3-1
5-1
5-2
5-2

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