A2F200M3F-1FGG484 Actel, A2F200M3F-1FGG484 Datasheet - Page 29

FPGA - Field Programmable Gate Array 200K System Gates SmartFusion

A2F200M3F-1FGG484

Manufacturer Part Number
A2F200M3F-1FGG484
Description
FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
Manufacturer
Actel
Datasheet

Specifications of A2F200M3F-1FGG484

Processor Series
A2F200
Core
ARM Cortex M3
Number Of Logic Blocks
8
Maximum Operating Frequency
120 MHz
Number Of Programmable I/os
161
Data Ram Size
4608 bit
Delay Time
200 ns
Supply Voltage (max)
3.6 V
Supply Current
1 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
200000
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Embedded Nonvolatile Memory Dynamic Contribution—P
Main Crystal Oscillator Dynamic Contribution—P
Low Power Oscillator Crystal Dynamic Contribution—P
RC Oscillator Dynamic Contribution—P
Analog System Dynamic Contribution—P
Standby Mode and Time Keeping Mode
P
SoC Mode
P
P
Where:
Standby Mode and Time Keeping Mode
P
SoC Mode
P
Standby Mode
P
Time Keeping Mode
P
Operating, Standby, and Time Keeping Mode
P
SoC Mode
P
Standby Mode and Time Keeping Mode
P
SoC Mode
P
+ P
Where:
N
N
N
N
N
N
P
P
AB
ADC
PLL
eNVM
eNVM
eNVM
XTL-OSC
XTL-OSC
XTL-OSC
LPXTAL-OSC
RC-OSC
RC-OSC
VR
CM
TM
SDD
ABPS
ADC
COMP
VR
The eNVM dynamic power consumption is a piecewise linear function of frequency.
N
β
F
= P
= P
is the number of temperature monitor blocks
READ-eNVM
is the number of current monitor blocks
= P
eNVM-BLOCKS
4
= 0 W
is the number of sigma-delta DAC blocks
is the number of ADC blocks
is the eNVM enable rate for read operations. Default is 0 (eNVM mainly in idle state).
= N
= N
= 0 W
is the number of ABPS blocks
AC28
AC23
is the number of comparator blocks
AC20A
= P
= 0 W
= P
= 0 W
= 0 W
eNVM-BLOCKS
eNVM-BLOCKS
AC19A +
* N
= P
AC18
+ P
TM
is the eNVM read clock frequency.
AC21
AC20B
is the number of eNVM blocks used in the design.
+ P
P
AC19B
AC24
*
*
β
β
4
4
* N
* P
*(P
CM
AC15
AC16
+ P
* F
+ P
AC25
READ-eNVM
AC17
R e v i s i o n 6
* N
RC-OSC
AB
* F
ABPS
READ-eNVM
when F
+ P
AC26
XTL-OSC
SmartFusion Intelligent Mixed Signal FPGAs
READ-eNVM
) when F
* N
LPXTAL-OSC
SDD
eNVM
+ P
READ-eNVM
≤ 33 MHz,
AC27
* N
COMP
> 33 MHz
+ P
ADC
* N
ADC
2- 17

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