A2F200M3F-1FGG484 Actel, A2F200M3F-1FGG484 Datasheet - Page 45

• Manufacturer Part Number: A2F200M3F-1FGG484
• Description: FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
• Manufacturer: Actel

Specifications of A2F200M3F-1FGG484

• Processor Series: A2F200
• Core: ARM Cortex M3
• Number Of Logic Blocks: 8
• Maximum Operating Frequency: 120 MHz
• Number Of Programmable I/os: 161
• Data Ram Size: 4608 bit
• Delay Time: 200 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 1 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 200000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-43 • 2.5 V LVCMOS High Slew
Table 2-44 • 2.5 V LVCMOS Low Slew
Table 2-45 • 2.5 V LVCMOS High Slew
Drive
Strength
4 mA
8 mA
12 mA
16 mA
24 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive
Strength
4 mA
8 mA
12 mA
16 mA
24 mA
Note:
Drive
Strength
8 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Speed
Grade
Worst Commercial-Case Conditions: T
Worst-Case VCCxxxxIOBx = 2.3 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Worst Commercial-Case Conditions: T
Worst-Case VCCxxxxIOBx = 2.3 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Worst Commercial-Case Conditions: T
Worst-Case VCCxxxxIOBx = 3.0 V
Applicable to MSS I/O Banks
Std.
Std.
Std.
Std.
Std.
Timing Characteristics
Speed
–1
–1
–1
–1
–1
Grade
Std.
Std.
Std.
Std.
Std.
–1
–1
–1
–1
–1
Speed
Grade
Std.
–1
t
DOUT
0.55
0.46
0.55
0.46
0.60
0.50
0.60
0.50
0.60
0.50
t
DOUT
0.55
0.46
0.55
0.46
0.60
0.50
0.60
0.50
0.60
0.50
t
0.22
0.18
DOUT
8.10
6.75
4.85
4.04
3.28
2.73
3.09
2.57
2.95
2.46
t
DP
10.50
8.75
7.61
6.34
5.92
4.93
5.53
4.61
5.18
4.32
t
DP
2.35
1.96
t
DP
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
t
DIN
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
t
DIN
0.09
0.07
t
DIN
1.23
1.03
1.23
1.03
1.23
1.03
1.23
1.03
1.23
1.03
t
PY
1.23
1.03
1.23
1.03
1.23
1.03
1.23
1.03
1.23
1.03
t
PY
J
1.18
0.99
t
t
PY
= 85°C, Worst-Case VCC = 1.425 V,
J
J
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
EOUT
t
EOUT
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
0.39
0.32
= 85°C, Worst-Case VCC = 1.425 V,
= 85°C, Worst-Case VCC = 1.425 V,
R e v i s i o n 6
t
1.39
1.16
PYS
7.37
6.14
4.76
3.97
3.46
2.88
3.27
2.72
3.01
2.51
t
10.69
8.91
7.46
6.22
5.79
4.83
5.40
4.50
5.28
4.40
ZL
t
ZL
Table 2-7 on page 2-9
Table 2-7 on page 2-9
t
8.10
6.75
4.85
4.04
3.23
2.69
2.88
2.40
2.31
1.93
0.22
0.18
EOUT
t
10.50
ZH
8.75
7.19
5.99
5.45
4.54
5.09
4.24
5.14
4.29
t
SmartFusion Intelligent Mixed Signal FPGAs
ZH
Table 2-7 on page 2-9
2.54
2.12
2.90
2.42
3.15
2.62
3.20
2.67
3.27
2.73
t
2.40
2.00
t
LZ
2.54
2.12
2.81
2.34
3.04
2.53
3.09
2.58
3.27
2.72
ZL
t
LZ
2.17
1.81
2.83
2.36
3.24
2.70
3.35
2.79
3.76
3.13
t
2.07
1.73
2.66
2.22
3.06
2.55
3.16
2.64
3.64
3.03
2.18
1.82
HZ
t
t
HZ
ZH
for derating values.
for derating values.
12.75
10.62
t
9.43
7.85
6.82
5.68
5.52
4.60
5.33
4.44
5.07
4.22
t
9.52
7.93
7.85
6.54
7.46
6.22
7.34
6.11
2.19
1.82
ZLS
ZLS
t
LZ
for derating values.
10.15
12.56
10.47
2.32
1.93
t
8.46
6.91
5.76
5.29
4.41
4.94
4.12
4.37
3.64
t
9.25
7.71
7.51
6.26
7.14
5.95
7.20
6.00
t
ZHS
ZHS
HZ
Units
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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