MCF5282CVM66 Freescale Semiconductor, MCF5282CVM66 Datasheet - Page 581

• Manufacturer Part Number: MCF5282CVM66
• Description: IC MPU 512K 66MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The previous situations cover normal overlap conditions that arise with asynchronous trigger events on the
two queues. An additional conflict to consider is that the freeze condition can arise while the QADC is
actively executing CCWs. The conventional use for the debug mode is for software/hardware debugging.
When the CPU enters background debug mode, peripheral modules can cease operation. When freeze is
detected, the QADC completes the conversion in progress, unlike the abort that occurs when queue 1
suspends queue 2. After the freeze condition is removed, the QADC continues queue execution with the
next CCW in sequence.
Trigger events that occur during freeze are not captured. When a trigger event is pending for queue 2 before
freeze begins, that trigger event is remembered when the freeze is passed. Similarly, when freeze occurs
while queue 2 is suspended, after freeze, queue 2 resumes execution as soon as queue 1 is finished.
Situations 12 through 19
Freescale Semiconductor
Q1:
Q2:
QS:
0000
IDLE
Q2:
IDLE
T2
C1
ACTIVE
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
0010
(Figure 28-34
C2
Q1:
Q1:
T1
T1
TOR2
Figure 28-33. CCW Priority Situation 11
C1
Figure 28-34. CCW Freeze Situation 12
SUSPEND ACT
ACTIVE
T2
C1
1010
C2
to
C2
PF1
Figure
0110
C2
PF2
PAUSE
0101
FREEZE
PAUSE
28-41) show examples of all of the freeze situations.
T2
C3
ACTIVE
0110
C4
T1
TOR2
C3
SUSPEND
T2
ACTIVE
1010
C3
C4
Queued Analog-to-Digital Converter (QADC)
CF1
C4
CF1
0010
ACT
C4
CF2
RESUME = 1
IDLE
IDLE
0000
28-43