MC9S12XDT256MAG Freescale Semiconductor, MC9S12XDT256MAG Datasheet - Page 601

IC MCU 256K FLASH 144-LQFP

MC9S12XDT256MAG

Manufacturer Part Number
MC9S12XDT256MAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDT256MAG
Manufacturer:
FREESCALE
Quantity:
1 800
Part Number:
MC9S12XDT256MAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDT256MAG
Manufacturer:
FREESCALE
Quantity:
1 800
16.3.1.1
Read: Anytime
Write: Anytime
Freescale Semiconductor
Address: 0x0121
IVB_ADDR[7:0]
Reset
Field
7–0
W
R
Interrupt Vector Base Register (IVBR)
1
7
Interrupt Vector Base Address Bits — These bits represent the upper byte of all vector addresses. Out of
reset these bits are set to 0xFF (i.e., vectors are located at 0xFF10–0xFFFE) to ensure compatibility to
HCS12.
Note: A system reset will initialize the interrupt vector base register with “0xFF” before it is used to determine
Note: If the BDM is active (i.e., the CPU is in the process of executing BDM firmware code), the contents of
the reset vector address. Therefore, changing the IVBR has no effect on the location of the three reset
vectors (0xFFFA–0xFFFE).
IVBR are ignored and the upper byte of the vector address is fixed as “0xFF”.
1
6
Figure 16-3. Interrupt Vector Base Register (IVBR)
Table 16-2. IVBR Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
1
5
1
4
IVB_ADDR[7:0]
Description
1
3
1
2
Chapter 16 Interrupt (S12XINTV1)
1
1
1
0
601

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