MC9S12XDT256MAG Freescale Semiconductor, MC9S12XDT256MAG Datasheet - Page 347

IC MCU 256K FLASH 144-LQFP

MC9S12XDT256MAG

Manufacturer Part Number
MC9S12XDT256MAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDT256MAG
Manufacturer:
FREESCALE
Quantity:
1 800
Part Number:
MC9S12XDT256MAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDT256MAG
Manufacturer:
FREESCALE
Quantity:
1 800
7.3.2.29
Read: Anytime.
Write: Has no effect.
All bits reset to zero.
These registers are used to latch the value of the corresponding pulse accumulator when the related bits in
register ICPAR are enabled (see
Freescale Semiconductor
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
PA3H7
PA2H7
PA1H7
PA0H7
8-Bit Pulse Accumulators Holding Registers (PA3H–PA0H)
0
0
0
0
7
7
7
7
Figure 7-51. 8-Bit Pulse Accumulators Holding Register 3 (PA3H)
Figure 7-52. 8-Bit Pulse Accumulators Holding Register 2 (PA2H)
Figure 7-53. 8-Bit Pulse Accumulators Holding Register 1 (PA1H)
Figure 7-54. 8-Bit Pulse Accumulators Holding Register 0 (PA0H)
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
PA3H6
PA2H6
PA1H6
PA0H6
0
0
0
0
6
6
6
6
Section 7.4.1.3, “Pulse
PA3H5
PA2H5
PA1H5
PA0H5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
0
5
5
5
5
PA3H4
PA2H4
PA1H4
PA0H4
0
0
0
0
4
4
4
4
Accumulators”).
PA3H3
PA2H3
PA1H3
PA0H3
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
0
0
0
0
3
3
3
3
PA3H2
PA2H2
PA1H2
PA0H2
0
0
0
0
2
2
2
2
PA3H1
PA2H1
PA1H1
PA0H1
0
0
0
0
1
1
1
1
PA3H0
PA2H0
PA1H0
PA0H0
0
0
0
0
0
0
0
0
347

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