PIC18F6410-I/PT Microchip Technology, PIC18F6410-I/PT Datasheet - Page 399

• Manufacturer Part Number: PIC18F6410-I/PT
• Description: IC PIC MCU FLASH 8KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6410-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

INDEX
A
A/D ................................................................................... 255
Absolute Maximum Ratings ............................................. 351
AC (Timing) Characteristics ............................................. 368
Access Bank ...................................................................... 77
ACKSTAT ........................................................................ 207
ACKSTAT Status Flag ..................................................... 207
ADCON0 Register ............................................................ 255
ADCON1 Register ............................................................ 255
ADCON2 Register ............................................................ 255
ADDFSR .......................................................................... 340
ADDLW ............................................................................ 303
Addressable Universal Synchronous Asynchronous
ADDULNK ........................................................................ 340
ADDWF ............................................................................ 303
ADDWFC ......................................................................... 304
ADRESH Register ............................................................ 255
ADRESL Register .................................................... 255, 258
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 304
ANDWF ............................................................................ 305
Assembler
AUSART
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A/D Converter Interrupt, Configuring ....................... 259
Acquisition Requirements ........................................ 260
ADCON0 Register .................................................... 255
ADCON1 Register .................................................... 255
ADCON2 Register .................................................... 255
ADRESH Register ............................................ 255, 258
ADRESL Register .................................................... 255
Analog Port Pins ...................................................... 148
Analog Port Pins, Configuring .................................. 262
Associated Registers ............................................... 264
Calculating the Minimum Required
Configuring the Module ............................................ 259
Conversion Clock (T
Conversion Status (GO/DONE Bit) .......................... 258
Conversions ............................................................. 263
Converter Characteristics ........................................ 387
Discharge ................................................................. 263
Operation in Power-Managed Modes ...................... 262
Selecting, Configuring Automatic
Special Event Trigger (CCP) .................................... 264
Use of the CCP2 Trigger .......................................... 264
Load Conditions for Device Timing
Parameter Symbology ............................................. 368
Temperature and Voltage Specifications ................. 369
Timing Conditions .................................................... 369
GO/DONE Bit ........................................................... 258
Receiver Transmitter (AUSART). See AUSART.
MPASM Assembler .................................................. 348
Asynchronous Mode ................................................ 246
Acquisition Time .............................................. 260
Acquisition Time .............................................. 261
Specifications ................................................... 369
Associated Registers, Receive ........................ 249
Associated Registers, Transmit ....................... 247
Receiver ........................................................... 248
Setting up 9-Bit Mode with
Transmitter ....................................................... 246
Address Detect ........................................ 248
AD
) ........................................... 261
PIC18F6310/6410/8310/8410
Auto-Wake-up on Sync Break Character ......................... 232
B
Bank Select Register (BSR) .............................................. 75
Baud Rate Generator ...................................................... 203
BC .................................................................................... 305
BCF ................................................................................. 306
BF .................................................................................... 207
BF Status Flag ................................................................. 207
Block Diagrams
Baud Rate Generator (BRG) ................................... 244
Synchronous Master Mode ...................................... 250
Synchronous Slave Mode ........................................ 253
16-Bit Byte Select Mode ............................................ 99
16-Bit Byte Write Mode .............................................. 97
16-Bit Word Write Mode ............................................ 98
8-Bit Multiplexed Mode ............................................ 102
A/D ........................................................................... 258
Analog Input Model .................................................. 259
AUSART Receive .................................................... 248
AUSART Transmit ................................................... 246
Baud Rate Generator .............................................. 203
Capture Mode Operation ......................................... 169
Comparator
Comparator Analog Input Model .............................. 269
Comparator Output .................................................. 268
Comparator Voltage Reference ............................... 272
Comparator Voltage Reference
Compare Mode Operation ....................................... 171
Device Clock .............................................................. 40
EUSART Receive .................................................... 230
EUSART Transmit ................................................... 227
External Clock Input, EC Oscillator ........................... 36
External Clock Input, HS Oscillator ........................... 36
External Power-on Reset Circuit
Fail-Safe Clock Monitor ........................................... 293
Generic I/O Port Operation ...................................... 125
High/Low-Voltage Detect with External Input .......... 276
Interrupt Logic .......................................................... 110
MSSP (I
MSSP (I
MSSP (SPI Mode) ................................................... 177
On-Chip Reset Circuit ................................................ 55
PIC18F6310/6410 ..................................................... 12
PIC18F8310/8410 ..................................................... 13
PLL (HS Mode) .......................................................... 37
PORTD and PORTE (Parallel Slave Port) ............... 148
PWM Operation (Simplified) .................................... 173
RC Oscillator Mode ................................................... 37
Associated Registers ....................................... 244
Baud Rate Error, Calculating ........................... 244
Baud Rates, Asynchronous Modes ................. 245
High Baud Rate Select (BRGH Bit) ................. 244
Operation in Power-Managed Modes .............. 244
Sampling ......................................................... 244
Associated Registers, Receive ........................ 252
Associated Registers, Transmit ....................... 251
Reception ........................................................ 252
Transmission ................................................... 250
Associated Registers, Receive ........................ 254
Associated Registers, Transmit ....................... 253
Reception ........................................................ 254
Transmission ................................................... 253
I/O Operating Modes ....................................... 266
Output Buffer Example .................................... 273
(Slow V
2
2
C Master Mode) ........................................ 201
C Mode) .................................................... 186
DD
Power-up) ........................................ 57
DS39635C-page 399