PIC18F6410-I/PT Microchip Technology, PIC18F6410-I/PT Datasheet - Page 340

• Manufacturer Part Number: PIC18F6410-I/PT
• Description: IC PIC MCU FLASH 8KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6410-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F6310/6410/8310/8410
25.2.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39635C-page 340
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
EXTENDED INSTRUCTION SET
=
=
literal ‘k’
ADDFSR 2, 23h
Add Literal to FSR
ADDFSR f, k
0  k  63
f  [0, 1, 2]
FSR(f) + k  FSR(f)
None
The 6-bit literal ‘k’ is added to the
contents of the FSR specified by ‘f’.
1
1
Read
1110
Q2
03FFh
0422h
1000
Process
Data
Q3
ffkk
Write to
FSR
kkkk
Q4
ADDULNK
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Operation
Decode
FSR2
PC
FSR2
PC
No
Q1
Add Literal to FSR2 and Return
ADDULNK k
0  k  63
FSR2 + k  FSR2,
(TOS) PC
None
The 6-bit literal ‘k’ is added to the
contents of FSR2. A RETURN is then
executed by loading the PC with the
TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be though of as a special case
of the ADDFSR instruction, where f = 3
(binary ‘11’); it operates only on FSR2.
1
2
=
=
=
=
Operation
1110
literal ‘k’
ADDULNK 23h
Read
No
Q2
03FFh
0100h
0422h
(TOS)
 2010 Microchip Technology Inc.
1000
Operation
Process
Data
No
Q3
11kk
Operation
Write to
FSR
kkkk
No
Q4