EVAL-ADUC814QS Analog Devices Inc, EVAL-ADUC814QS Datasheet - Page 20

• Manufacturer Part Number: EVAL-ADUC814QS
• Description: KIT DEV FOR ADUC814 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: 8052-corer

Specifications of EVAL-ADUC814QS

• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• For Use With/related Products: ADuC814
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADuC814
SPECIAL FUNCTION REGISTERS
All registers, except the program counter and the four general-
purpose register banks, reside in the SFR area. The SFR registers
include control, configuration, and data registers that provide an
interface between the CPU and all on-chip peripherals.
Figure 22 shows a full SFR memory map and SFR contents on
RESET; NOT USED indicates unoccupied SFR locations.
Note the following about SFRs:
•
•
•
•
•
SFR MAP KEY:
FFH
F7H
EFH
E7H
DFH
D7H
CFH
C7H
BFH
B7H
AFH
9FH
97H
8FH
PRE3
ADCI
SM0
ISPI
TF2
TF1
PSI
D1
CY
RD
EA
SFRs whose address ends in 0H or 8H are bit addressable.
Only P1.0 and P1.1 can operate as digital I/O pins. P1.2–P1.7 can be configured as analog inputs (ADC inputs) or as digital inputs.
The CHIPID SFR contains the silicon revision ID byte and may change for future silicon revisions.
These registers are reconfigured at power-on with factory calculated calibration coefficients that can be overwritten by user code. See
the calibration options in ADCCON3 SFR.
When the SPIM bit in the SPICON SFR is cleared, the SPR0 bit reflects the level on the SS pin (Pin 22).
0
0 F6H
0 EEH
0 E6H
0
0
0
0
0
1
0
0
1 96H
0
ADCSPI
FEH
DEH
D6H
CEH
C6H
BEH
B6H
AEH
9EH
8EH
WCOL
PADC
EADC
D1EN
PRE2
EXF2
SM1
TR1
WR
AC
0
0
0 F5H
0
0 E5H
0
0
0
0
0
1
0
1 95H
0
CCONV
FDH
EDH
DDH
D5H
CDH
C5H
BDH
B5H
ADH
9DH
8DH
RCLK
PRE1
SPE
SM2
PT2
ET2
TF0
D0
F0
T1
0
0
0 F4H
0 ECH
0 E4H
0
0
0
0 C4H
0
1
0
1 94H
0
FCH
SCONV
DCH
D4H
CCH
BCH
B4H
ACH
9CH
8CH
TCLK
PRE0
SPIM
REN
RS1
TR0
PS
ES
T0
0
0 F3H
0 EBH
0 E3H
0
0
0
1
0
1
0
0
1 93H
0
FBH
DBH
D3H
CBH
C3H
BBH
B3H
ABH
9BH
8BH
EXEN2
CPOL
D0EN
WDIR
INT1
CS3
RS0
PT1
ET1
TB8
IE1
DEFAULT VALUE
SFR ADDRESS
0
0 F2H
0 EAH
0 E2H
0
0
0
0
0
1
0
0
1 92H
0
MNEMONIC
FAH
DAH
D2H
CAH
C2H
BAH
B2H
AAH
9AH
8AH
CPHA
WDS
INT0
CS2
TR2
PX1
EX1
RB8
OV
IT1
1
0
0
0
0
0
0
0
0
1
0
0
1
0
F9H
F1H
E9H
E1H
D9H
D1H
C9H
C1H
B9H
B1H
A9H
99H
91H
89H
SPR1
CNT2
Figure 22. Special Function Register Locations and Reset Values
T2EX
CS1
PT0
TxD
ET0
WD
IE0
FI
TI
THESE BITS ARE CONTAINED IN THIS BYTE.
0
0 F0H
0 E8H
0 E0H
0
0
0
0
0
1
0
0
1
0
F8H
D8H
D0H
C8H
WDWR
C0H
B8H
B0H
A8H
98H
90H
88H
SPR0
CAP2
CS0
RxD
PX0
EX0
IT0
T2
89H
RI
P
IE0
5
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
BITS
88H
IT0
Rev. A | Page 20 of 72
0
ADCCON2
E0H
D8H
D0H
C8H
B0H
C0H
B8H
A8H
98H
90H
F8H
F0H
E8H
NOT USED
88H
NOT USED
SPICON
WDCON
T2CON
SCON
DCON
TCON
PSW
ACC
P1
P3
IP
IE
B
1,2
1
88H
1
1
00H
00H
FFH
00H
1
10H
FFH
04H
00H
00H
00H
00H
00H
00H
00H
TCON
1
1
1
1
1
1
1
1
1
00H
ADCDATAL
RESERVED
TIMECON HTHSEC
RESERVED
RESERVED
RESERVED
RESERVED
A1H
F9H
F1H
D9H
RESERVED
B9H
A9H
99H
89H
81H
Unoccupied locations in the SFR address space are not
implemented, i.e., no register exists at this location. If an
unoccupied location is read, an unspecified value is returned.
SFR locations reserved for future use are shaded (RESERVED)
and should not be accessed by the user software.
ADCOFSL
NOT USED
DAC0L
ECON
TMOD
SBUF
IEIP2
SP
A0H
00H
00H
00H
00H
00H
00H
07H
00H
SFR ADDRESS
MNEMONIC
DEFAULT VALUE
ADCDATAH
RESERVED
RESERVED RESERVED RESERVED RESERVED RESERVED
A2H
RESERVED
RESERVED
C2H
FAH
ADCOFSH
F2H
DAH
RESERVED
CAH
BAH
9AH
8AH
82H
NOT USED
RCAP2L
I2CDAT
DAC0H
CHIPID
ETIM1
DPL
TL0
00H
00H
20H
00H
00H
0XH
00H
00H
00H
00H
FBH
ADCGAINL
F3H
RESERVED
RESERVED
RESERVED
RESERVED
CBH
BBH
RESERVED RESERVED RESERVED RESERVED
A3H
8BH
83H
RESERVED
9BH
NOT USED
RCAP2H
I2CADD
DAC1L
ETIM2
SEC
DPH
TL1
00H
00H
00H
00H
55H
00H
00H
00H
9CH
ADCGAINH
FCH
F4H
RESERVED
RESERVED
RESERVED
RESERVED
CCH
BCH
8CH
RESERVED
A4H
NOT USED
NOT USED
EDATA1
CFG814
DAC1H
MIN
TH0
TL2
00H
00H
00H
00H
00H
00H
04H
ADCCON3
FDH
F5H
RESERVED
RESERVED
RESERVED
RESERVED
CDH
RESERVED
BDH
8DH
RESERVED
DACCON
A5H
NOT USED
NOT USED
EDATA2
HOUR
TH2
TH1
04H
00H
00H
00H
00H
00H
RESERVED RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
C6H
BEH
RESERVED
A6H
NOT USED
NOT USED
EDATA3
EDARL
INTVAL
00H
00H
00H
ADCCON1
RESERVED
F7H
EFH
RESERVED
DFH DEH
D7H
RESERVED
RESERVED
BFH
RESERVED
87H
PSMCON
NOT USED
NOT USED
NOT USED
NOT USED
PLLCON
EDATA4
SPIDAT
PCON
00H
00H
00H
00H
53H