MC56F8323EVME Freescale Semiconductor, MC56F8323EVME Datasheet - Page 104

• Manufacturer Part Number: MC56F8323EVME
• Description: BOARD EVALUATION MC56F8323
• Manufacturer: Freescale Semiconductor
• Type: DSPr

Specifications of MC56F8323EVME

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC56F8322 and MC56F8323
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: 56800/E
• Core Sub-architecture: 56800/E
• Silicon Core Number: MC56F
• Silicon Family Name: MC56F83xx
• Rohs Compliant: Yes
• For Use With/related Products: MC56F8322, MC56F8323
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.3 Memory Maps
The width of the GPIO port defines how many bits are implemented in each of the GPIO registers. Based
on this and the default function of each of the GPIO pins, the reset values of the GPIOX_PUR and
GPIOX_PER registers change from port to port. Tables
of these registers.
Part 9 Joint Test Action Group (JTAG)
9.1 JTAG Information
Please contact your Freescale sales representative or authorized distributor for device/package-specific
BSDL information.
104
GPIOB7
GPIOC0
GPIOC1
GPIOC2
GPIOC3
GPIOC4
GPIOC5
GPIOC6
GPIO Function
PHASEA0 / TA0
EXTAL
XTAL
CAN_RX
CAN_TX
TC3
TC1 / RXD0
TC0 / TXD0
Peripheral
Table 8-3 GPIO External Signals Map (Continued)
Function
46
52
47
61
62
63
64
1
56F8323 Technical Data, Rev. 17
Package
Pin
Quad Decoder 0 register DECCR is used to select between
Decoder 0 and Timer A
Quad Decoder is NOT available in 56F8123
Pull-ups default to disabled
Pull-ups default to disabled
CAN is NOT available in 56F8123
CAN is NOT available in 56F8123
SIM register SIM_GPS is used to select between Timer C and
SCI0 on a pin-by-pin basis
SIM register SIM_GPS is used to select between Timer C and
SCI0 on a pin-by-pin basis
4-21
through
4-23
Notes
define the actual reset values
Freescale Semiconductor
Preliminary