C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 55
![BOARD PROTOTYPE W/C8051F540](/photos/9/25/92559/c8051f540-tb_sml.jpg)
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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Table 6.9. ADC0 Electrical Characteristics
VDDA
DC Accuracy
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Full Scale Error
Offset Temperature Coefficient
Dynamic performance (10 kHz sine-wave single-ended input, 1 dB below Full Scale, 200 ksps)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Conversion Rate
SAR Conversion Clock
Conversion Time in SAR Clocks
Track/Hold Acquisition Time
Throughput Rate
Analog Inputs
ADC Input Voltage Range
Absolute Pin Voltage with respect
to GND
Sampling Capacitance
Input Multiplexer Impedance
Power Specifications
Power Supply Current
(VDDA supplied to ADC0)
Burst Mode (Idle)
Power-On Time
Power Supply Rejection
Notes:
1. Represents one standard deviation from the mean. Offset and full-scale error can be removed through
2. An additional 2 FCLK cycles are required to start and complete a conversion
3. Additional tracking time may be required depending on the output impedance connected to the ADC input.
4. An increase in tracking time will decrease the ADC throughput.
5. See Section “
= 1.8 to 2.75 V, –40 to +125 °C, VREF = 1.5 V (REFSL=0) unless otherwise specified.
calibration.
See Section “
Parameter
1
4
5.2.1. Settling Time Requirements
5.3. Selectable Gain
5
3
2
Guaranteed Monotonic
Up to the 5th harmonic;
VDDA > 2.0 V
VDDA < 2.0 V
VDDA > 2.0 V
gain = 1.0 (default)
gain = n
Operating Mode, 200 ksps
” on page
Conditions
35
Rev. 1.1
for more information about the setting the gain.
” on page
34
.
Min
–10
–20
1.5
3.5
63
13
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
5
1100
1100
±0.5
±0.5
Typ
–60
3.0
5.7
7.7
-82
65
80
31
—
—
—
—
—
—
—
—
3
12
C8051F54x
VREF / n
VREF
1500
1500
Max
200
V
3.6
10
20
±3
±1
—
—
—
—
—
—
—
—
—
—
—
IO
ppm/°C
clocks
Units
mV/V
MHz
ksps
LSB
LSB
LSB
LSB
bits
k
dB
dB
dB
pF
µA
µA
µs
µs
V
V
55
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