C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 169
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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SFR Definition 18.27. P3SKIP: Port 3Skip
SFR Address = 0xD7; SFR Page = 0x0F
Note: Port P3.0 is only available on the 32-pin packages.
Name
Reset
Bit
7:1
Type
0
Bit
P3SKIP[0]
Unused
Name
R
7
0
Read = 0000000b; Write = Don’t Care.
Port 3 Crossbar Skip Enable Bits.
These bits select Port 3 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P3.n pin is not skipped by the Crossbar.
1: Corresponding P3.n pin is skipped by the Crossbar.
R
6
0
R
5
0
Rev. 1.1
R
4
0
Function
R
3
0
R
2
0
C8051F54x
R
1
0
P3SKIP[0]
R/W
0
0
169
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