C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 150

BOARD PROTOTYPE W/C8051F540

C8051F540-TB

Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F540-TB

Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
C8051F54x
18.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions
External digital event capture functions can be used to trigger an interrupt or wake the device from a low
power mode when a transition occurs on a digital I/O pin. The digital event capture functions do not require
dedicated pins and will function on both GPIO pins (PnSKIP = 1) and pins in use by the Crossbar (PnSKIP
= 0). External digital event capture functions cannot be used on pins configured for analog I/O. Table 18.3
shows all available external digital event capture functions.
18.3. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 18.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource excluding UART0, which is always assigned to pins P0.4 and P0. If a Port pin is assigned, the
Crossbar skips that pin when assigning the next selected resource. Additionally, the Crossbar will skip Port
pins whose associated bits in the PnSKIP registers are set. The PnSKIP registers allow software to skip
Port pins that are to be used for analog input, dedicated functions, or GPIO.
Because of the nature of Priority Crossbar Decoder, not all peripherals can be located on all port pins.
Figure 18.3 maps peripherals to the potential port pins on which the peripheral I/O can appear.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to P0.0 if VREF is used, P0.1 if the
ADC is configured to use the external conversion start signal (CNVSTR), P0.3 and/or P0.2 if the external
oscillator circuit is enabled, and any selected ADC or Comparator inputs. The Crossbar skips selected pins
as if they were already assigned, and moves to the next unassigned pin.
150
Any pin used for GPIO
*Note: P2.2-P2.7, P3.0 are only available on the 32-pin packages.
Digital Function
External Interrupt 0
External Interrupt 1
Port Match
*Note: P2.2-P2.7, P3.0 are only available on the 32-pin packages.
Digital Function
Table 18.3. Port I/O Assignment for External Digital Event Capture Functions
Table 18.2. Port I/O Assignment for Digital Functions
Potentially Assignable Port Pins
Potentially Assignable Port Pins
Rev. 1.1
P0.0–P3.0*
P0.0–P3.0*
P1.0–P1.7
P1.0–P1.7
P0MASK, P0MAT
P1MASK, P1MAT
P2MASK, P2MAT
P3MASK, P3MAT
P0SKIP, P1SKIP,
SFR(s) used for
P2SKIP, P3SKIP
SFR(s) used for
Assignment
Assignment
IT01CF
IT01CF

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