C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 178
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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C8051F54x
SFR Definition 19.3. LIN0CF: LIN0 Control Mode Register
SFR Address = 0xC9; SFR Page = 0x0F
178
Name
Reset
4:0
Bit
Type
7
6
5
Bit
ABAUD
Unused
LINEN
MODE
LINEN
Name
R/W
7
0
MODE
LIN Interface Enable Bit.
0: LIN0 is disabled.
1: LIN0 is enabled.
LIN Mode Selection Bit.
0: LIN0 operates in slave mode.
1: LIN0 operates in master mode.
LIN Mode Automatic Baud Rate Selection.
This bit only has an effect when the MODE bit is configured for slave mode.
0: Manual baud rate selection is enabled.
1: Automatic baud rate selection is enabled.
Read = 00000b; Write = Don’t Care
R/W
6
1
ABAUD
R/W
5
1
R
4
0
Rev. 1.1
Function
R
3
0
R
2
0
R
1
0
R
0
0
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