C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 203

BOARD PROTOTYPE W/C8051F540

C8051F540-TB

Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F540-TB

Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
Values Read
0100 0 0 0 A slave byte was transmitted;
0101 0 X X An illegal STOP or bus error
0010 1 0 X A slave address + R/W was
0001 0 0 X A STOP was detected while
0000 1 0 X A slave byte was received;
0 0 1 A slave byte was transmitted;
0 1 X A Slave byte was transmitted;
1 1 X Lost arbitration as master;
1 1 X Lost arbitration while attempt-
Current SMbus State
NACK received.
ACK received.
error detected.
was detected while a Slave
Transmission was in progress.
received; ACK requested.
slave address + R/W received;
ACK requested.
addressed as a Slave Trans-
mitter or Slave Receiver.
ing a STOP.
ACK requested.
Table 20.4. SMBus Status Decoding
Rev. 1.1
Typical Response Options
No action required (expecting
STOP condition).
Load SMB0DAT with next data
byte to transmit.
No action required (expecting
Master to end transfer).
Clear STO.
If Write, Acknowledge received
address
If Read, Load SMB0DAT with
data byte; ACK received address
NACK received address.
If Write, Acknowledge received
address
If Read, Load SMB0DAT with
data byte; ACK received address
NACK received address.
Reschedule failed transfer;
NACK received address.
Clear STO.
No action required (transfer
complete/aborted).
Acknowledge received byte;
Read SMB0DAT.
NACK received byte.
C8051F54x
Values to
Write
0 0 X 0001
0 0 X 0100
0 0 X 0001
0 0 X
0 0 1
0 0 1
0 0 0
0 0 1
0 0 1
0 0 0
1 0 0
0 0 X
0 0 0
0 0 1
0 0 0
0000
0100
0000
0100
0000
1110
203

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