C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 175

• Manufacturer Part Number: C8051F560-TB
• Description: BOARD PROTOTYPE W/C8051F560
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F560-TB

• Contents: Board
• Processor To Be Evaluated: C8051F56x
• Processor Series: C8051F56x
• Interface Type: USB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V to 5.25 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F55x, C8051F56x, C8051F57x
• For Use With: 336-1691 - KIT DEVELOPMENT FOR C8051F560
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1694

SFR Definition 19.2. XBR1: Port I/O Crossbar Register 1
SFR Address = 0xE2; SFR Page = 0x0F
Name
Reset
Bit
4:2 PCA0ME[2:0] PCA Module I/O Enable Bits.
Type
7
6
5
1
0
Bit
Reserved
SYSCKE
Name
ECIE
T1E
T0E
R/W
T1E
7
0
T1 Enable.
0: T1 unavailable at Port pin.
1: T1 routed to Port pin.
T0 Enable.
0: T0 unavailable at Port pin.
1: T0 routed to Port pin.
PCA0 External Counter Input Enable.
0: ECI unavailable at Port pin.
1: ECI routed to Port pin.
000: All PCA I/O unavailable at Port pins.
001: CEX0 routed to Port pin.
010: CEX0, CEX1 routed to Port pins.
011: CEX0, CEX1, CEX2 routed to Port pins.
100: CEX0, CEX1, CEX2, CEX3 routed to Port pins.
101: CEX0, CEX1, CEX2, CEX3, CEX4 routed to Port pins.
110: CEX0, CEX1, CEX2, CEX3, CEX4, CEX5 routed to Port pins.
111: RESERVED
/SYSCLK Output Enable.
0: /SYSCLK unavailable at Port pin.
1: /SYSCLK output routed to Port pin.
Always Write to 0.
R/W
T0E
6
0
ECIE
R/W
5
0
Rev. 1.1
R/W
4
0
PCA0ME[2:0]
Function
R/W
3
0
C8051F55x/56x/57x
R
2
0
SYSCKE
R/W
1
0
Reserved
R/W
0
0
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