EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 82

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

ADuC832
ADUC832 HARDWARE DESIGN CONSIDERATIONS
This section outlines some of the key hardware design
considerations that must be addressed when integrating the
ADuC832 into any hardware system.
CLOCK OSCILLATOR
The clock source for the ADuC832 can be generated by the
internal PLL or by an external clock input. To use the internal
PLL, connect a 32.768 kHz parallel resonant crystal between
XTAL1 and XTAL2, and connect a capacitor from each pin to
ground as shown in Figure 85. This crystal allows the PLL to
lock correctly to give a f
the PLL free runs, giving a f
useful if an external clock input is required. The part powers up
and the PLL free runs; the user can then write to the CFG832
SFR in the software to enable the external clock input on P3.4.
Whether using the internal PLL or an external clock source, the
ADuC832 specified operational clock speed range is 400 kHz to
16.78 MHz. The core itself is static, and functions all the way
down to dc. However, at clock speeds slower than 400 kHz, the
ADC no longer functions correctly. Therefore, to ensure specified
operation, use a clock frequency of at least 400 kHz and no
more than 16.78 MHz.
EXTERNAL MEMORY INTERFACE
In addition to its internal program and data memories, the
ADuC832 can access up to 64 kB of external program memory
(such as ROM and PROM) and up to 16 MB of external data
memory (SRAM).
To select from which code space (internal or external program
memory) to begin executing instructions, tie the EA (external
access) pin high or low, respectively. When EA is high (pulled
up to DV
the internal 62 kB of Flash/EE code space. When EA is low (tied
to ground), the user program execution starts at Address 0 of
the external code space.
EXTERNAL
SOURCE
CLOCK
Figure 85. External Parallel Resonant Crystal Connections
DD
), the user program execution starts at Address 0 of
Figure 86. Connecting an External Clock Source
XTAL1
XTAL2
P3.4
VCO
of 16.78 MHz. If no crystal is present,
VCO
of 16.7 MHz ± 20%. This is
ADuC832
ADuC832
TO INTERNAL
TIMING CIRCUITS
TO INTERNAL
TIMING CIRCUITS
Rev. A | Page 82 of 92
A second very important function of the EA pin is described in
the Single Pin Emulation Mode section.
External program memory (if used) must be connected to the
ADuC832 as illustrated in Figure 87. Note that 16 I/O lines
(Port 0 and Port 2) are dedicated to bus functions during
external program memory fetches. Port 0 (P0) serves as a
multiplexed address/data bus. It emits the low byte of the
program counter as an address, and then goes into a float state
awaiting the arrival of the code byte from the program memory.
During the time that the low byte of the program counter is
valid on P0, the signal address latch enable (ALE) clocks this
byte into an address latch. Meanwhile, Port 2 (P2) emits the
high byte of the program counter, then PSEN strobes the
EPROM and the code byte is read into the ADuC832.
Note that program memory addresses are always 16 bits wide,
even in cases where the actual amount of program memory
used is less than 64 kB. External program execution sacrifices two
of the 8-bit ports (P0 and P2) to the function of addressing the
program memory. While executing from external program
memory, Port 0 and Port 2 can be used simultaneously for
read/write access to external data memory, but not for general-
purpose I/O.
Though both external program memory and external data
memory are accessed by some of the same pins, the two are
completely independent of each other from a software point
of view. For example, the chip can read/write external data
memory while executing from external program memory.
Figure 88 shows a hardware configuration for accessing up to
64 kB of external RAM. This interface is standard to any 8051-
compatible MCU.
ADuC832
Figure 87. External Program Memory Interface
PSEN
ALE
P0
P2
LATCH
OE
D0 TO D7
(INSTRUCTION)
A0 TO A7
A8 TO A15
EPROM