EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 69

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

BITS
SFR
SPE = 0 (I
MDO
MDE
I2CM
MDI
(MASTER/SLAVE)
Figure 73. SDATA/MOSI Pin I/O Functional Equivalent in SPI Mode
Figure 74. SDATA/MOSI Pin I/O Functional Equivalent in I
HARDWARE SPI
HARDWARE I
Figure 72. SCLOCK Pin I/O Functional Equivalent in I
(SLAVE ONLY)
SPE = 0 (I
HARDWARE I
(SLAVE ONLY)
I2CM
BITS
MCO
SFR
2
C ENABLE)
SPE = 1 (SPI ENABLE)
2
C ENABLE)
REJECTION FILTER
2
REJECTION FILTER
C
2
C
50ns GLITCH
50ns GLITCH
Q1
Q3
DV
DV
DD
Q1
(OFF)
Q3
DD
Q2 (OFF)
Q4 (OFF)
Q2
Q4
DV
Q1
(OFF)
Q3
SCLOCK
DD
PIN
2
C Mode
SDATA/
Q2
Q4
MOSI
2
PIN
C Mode
SDATA/
MOSI
PIN
Rev. A | Page 69 of 92
MISO is shared with P3.3 and as such has the same configuration
as that shown in Figure 70.
READ-MODIFY-WRITE INSTRUCTIONS
Some 8051 instructions that read a port read the latch while
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called read-modify-write
instructions. Listed below are the read-modify-write instructions.
When the destination operand is a port, or a port bit, these
instructions read the latch rather than the pin.
Instruction
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C
CLR PX.Y
SETB PX.Y
1
The reason that read-modify-write instructions are directed to
the latch rather than the pin is to avoid a possible misinterpretation
of the voltage level of a pin. For example, a port pin might be
used to drive the base of a transistor. When a 1 is written to the
bit, the transistor is turned on. If the CPU then reads the same
port bit at the pin rather than the latch, it will read the base
voltage of the transistor and interpret it as a logic 0. Reading the
latch rather than the pin will return the correct value of 1.
These instructions read the port byte (all 8 bits), modify the addressed bit
and then write the new byte back to the latch.
1
1
1
Description
Logical AND, for example, ANL P1, A
Logical OR, for example, ORL P2, A
Logical EX-OR, for example., XRL P3, A
Jump if bit = 1 and clear bit, for example, JBC
P1.1, LABEL
Complement bit, for example, CPL P3.0
Increment, for example, INC P2
Decrement, for example, DEC P2
Decrement and jump if not zero, for example,
DJNZ P3, LABEL
Move carry to Bit Y of Port X
Clear Bit Y of Port X
Set Bit Y of Port X
ADuC832