EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 24
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EVAL-ADUC832QSZ
Manufacturer Part Number
EVAL-ADUC832QSZ
Description
KIT DEV FOR ADUC832 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Specifications of EVAL-ADUC832QSZ
Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADuC832
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
EVAL-ADUC832QS
EVAL-ADUC832QS
EVAL-ADUC832QS
ADuC832
Mnemonic
XTAL2
P2.4/A12/A20
P2.5/A13/A21
P2.6/PWM0/A14/A22
P2.7/PWM1/A15/A23
EA
PSEN
ALE
P0.0/AD0
P0.1/AD1
38
39
MQFP
33
36
37
40
41
42
43
44
Pin No.
LFCSP
35
39
40
41
42
43
44
45
46
47
Type
O
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
O
I/O
I
O
O
I/O
I/O
I/O
I/O
Description
Output of the Inverting Oscillator Amplifier.
Port 2 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 2 pins being pulled
externally low sources current because of the internal pull-up resistors.
during fetches from external program memory and middle and high order address
bytes during accesses to the external 24-bit external data memory space.
Port 2 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 2 pins being pulled
externally low sources current because of the internal pull-up resistors.
during fetches from external program memory and middle and high order address
bytes during accesses to the external 24-bit external data memory space.
Input/Output Port 2 (P2.6). Port 2 is a bidirectional port with internal pull-up resistors.
Port 2 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 2 pins being pulled
externally low sources current because of the internal pull-up resistors.
PWM0 Voltage Output (PWM0). PWM outputs can be configured to use Port 2.6 and
Port 2.7 or Port 3.4 and Port 3.3
during fetches from external program memory and middle and high order address
bytes during accesses to the external 24-bit external data memory space.
Input/Output Port 2 (P2.7). Port 2 is a bidirectional port with internal pull-up resistors.
Port 2 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 2 pins being pulled
externally low sources current because of the internal pull-up resistors.
PWM1 Voltage Output (PWM1). See the ADuC832 Configuration SFR (CFG832) section
for further information.
during fetches from external program memory and middle and high order address
bytes during accesses to the external 24-bit external data memory space.
External Access Enable, Logic Input. When held high, this input enables the device to
fetch code from internal program memory locations 0000H to 1FFFH. When held low,
this input enables the device to fetch all instructions from external program memory.
This pin should not be left floating.
Program Store Enable, Logic Output. This output is a control signal that enables the
external program memory to the bus during external fetch operations. It is active
every six oscillator periods except during external data memory accesses. This pin
remains high during internal program execution. PSEN can also be used to enable
serial download mode when pulled low through a resistor on power-up or reset.
Address Latch Enable, Logic Output. This output is used to latch the low byte (and
page byte for 24-bit address space accesses) of the address into external memory
during normal operation. It is activated every six oscillator periods except during an
external data memory access.
Input/Output Port 0 (P0.0). Port 0 is an 8-Bit Open-Drain Bidirectional I/O Port. Port 0
pins that have 1s written to them float and in that state can be used as high
impedance inputs.
address and data bus during accesses to external program or data memory. In this
application, it uses strong internal pull-ups when emitting 1s.
Input/Output Port 0 (P0.1). Port 0 is an 8-Bit Open-Drain Bidirectional I/O Port. Port 0
pins that have 1s written to them float and in that state can be used as high
impedance inputs.
address and data bus during accesses to external program or data memory. In this
application, it uses strong internal pull-ups when emitting 1s.
Input/Output Port 2 (P2.4). Port 2 is a bidirectional port with internal pull-up resistors.
External Memory Addresses (A12/A20). Port 2 emits the high order address bytes
Input/Output Port 2 (P2.5). Port 2 is a bidirectional port with internal pull-up resistors.
External Memory Addresses (A13/A21). Port 2 emits the high order address bytes
External Memory Addresses (A14/A22). Port 2 emits the high order address bytes
External Memory Addresses (A15/A23). Port 2 emits the high order address bytes
External Memory Address and Data (AD0). Port 0 is also the multiplexed low order
External Memory Address and Data (AD1). Port 0 is also the multiplexed low order
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