OM11014 NXP Semiconductors, OM11014 Datasheet - Page 47

• Manufacturer Part Number: OM11014
• Description: BOARD EVAL FOR LPC2919
• Manufacturer: NXP Semiconductors
• Series: Keilr
• Type: MCUr

Specifications of OM11014

• Contents: Board, Cable, CD
• For Use With/related Products: LPC2919
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Other names: 568-4360

NXP Semiconductors
LPC2917_19_1
Product data sheet
8.8.6.2 Description
The key features are:
The PMU controls all internal clocks of the device for power-mode management. With
some exceptions, each branch clock can be switched on or off individually under control of
software register bits located in its individual configuration register. Some branch clocks
controlling vital parts of the device operate in a fixed mode.
control bits are supported by each branch clock.
By programming the configuration register the user can control which clocks are switched
on or off, and which clocks are switched off when entering Power-down mode.
Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting
the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU
into power-down should be controlled by disabling the branch clock for the CPU.
Remark: For any disabled branch clocks to be re-activated their corresponding base
clocks must be running (controlled by the CGU).
Table 27
Every branch clock is related to one particular base clock: it is not possible to switch the
source of a branch clock in the PMU.
Table 27.
Legend:
‘1’ Indicates that the related register bit is tied off to logic HIGH, all writes are ignored
‘0’ Indicates that the related register bit is tied off to logic LOW, all writes are ignored
‘+’ Indicates that the related register bit is readable and writable
Branch clock name
CLK_SAFE
CLK_SYS_CPU
CLK_SYS
CLK_SYS_PCR
CLK_SYS_FMC
CLK_SYS_RAM0
CLK_SYS_RAM1
CLK_SYS_SMC
CLK_SYS_GESS
•
•
•
•
•
•
•
Individual clock control for all LPC2917/19 sub-modules
Activates sleeping clocks when a wake-up event is detected
Clocks can be individually disabled by software
Supports AHB master-disable protocol when AUTO mode is set
Disables wake-up of enabled clocks when Power-down mode is set
Activates wake-up of enabled clocks when a wake-up event is received
Status register is available to indicate if an input base clock can be safely switched off
(i.e., all branch clocks are disabled)
shows the relation between branch and base clocks, see also
Branch clock overview
Rev. 01 — 31 July 2008
Base clock
BASE_SAFE_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
ARM9 microcontroller with CAN and LIN
Implemented switch on/off
mechanism
WAKE-UP
0
+
+
+
+
+
+
+
+
Table 27
LPC2917/19
AUTO
0
+
+
+
+
+
+
+
+
shows which mode-
© NXP B.V. 2008. All rights reserved.
Section
RUN
1
1
1
1
+
+
+
+
+
7.2.1.
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