C8051F120DK Silicon Laboratories Inc, C8051F120DK Datasheet - Page 165
![DEVKIT-F120/21/22/23/24/25/26/27](/photos/9/20/92070/c8051f120dk_sml.jpg)
C8051F120DK
Manufacturer Part Number
C8051F120DK
Description
DEVKIT-F120/21/22/23/24/25/26/27
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F120DK.pdf
(350 pages)
Specifications of C8051F120DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F120
Silicon Family Name
C8051F12x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F120, 121, 122, 123, 124, 125, 126, 127
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1224
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F120DK
Manufacturer:
SiliconL
Quantity:
4
- Current page: 165 of 350
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12. Multiply And Accumulate (MAC0)
The C8051F120/1/2/3 and C8051F130/1/2/3 devices include a multiply and accumulate engine which can
be used to speed up many mathematical operations. MAC0 contains a 16-by-16 bit multiplier and a 40-bit
adder, which can perform integer or fractional multiply-accumulate and multiply operations on signed input
values in two SYSCLK cycles. A rounding engine provides a rounded 16-bit fractional result after an addi-
tional (third) SYSCLK cycle. MAC0 also contains a 1-bit arithmetic shifter that will left or right-shift the con-
tents of the 40-bit accumulator in a single SYSCLK cycle. Figure 12.1 shows a block diagram of the MAC0
unit and its associated Special Function Registers.
12.1. Special Function Registers
There are thirteen Special Function Register (SFR) locations associated with MAC0. Two of these regis-
ters are related to configuration and operation, while the other eleven are used to store multi-byte input
and output data for MAC0. The Configuration register MAC0CF (SFR Definition 12.1) is used to configure
and control MAC0. The Status register MAC0STA (SFR Definition 12.2) contains flags to indicate overflow
conditions, as well as zero and negative results. The 16-bit MAC0A (MAC0AH:MAC0AL) and MAC0B
(MAC0BH:MAC0BL) registers are used as inputs to the multiplier. The MAC0 Accumulator register is 40
bits long, and consists of five SFRs: MAC0OVR, MAC0ACC3, MAC0ACC2, MAC0ACC1, and
MAC0ACC0. The primary results of a MAC0 operation are stored in the Accumulator registers. If they are
needed,
(MAC0RNDH:MAC0RNDL).
the
rounded
MAC0OVR
1 bit Shift
MAC0CF
MAC0AH
MAC0 A Register
results
MAC0FM
Figure 12.1. MAC0 Block Diagram
MAC0ACC3
are
MAC0AL
MAC0RNDH
16 x 16 Multiply
MAC0 Rounding Register
stored
MAC0 Accumulator
Rounding Engine
MAC0ACC2
40 bit Add
Rev. 1.4
MAC0BH
in
MAC0 B Register
MAC0RNDL
C8051F120/1/2/3/4/5/6/7
the
MAC0ACC1
16-bit
MAC0BL
1
0
MAC0MS
C8051F130/1/2/3
Rounding
MAC0STA
Flag Logic
0
MAC0ACC0
Register
MAC0RND
165
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