LMK04000BEVALXO National Semiconductor, LMK04000BEVALXO Datasheet - Page 30

• Manufacturer Part Number: LMK04000BEVALXO
• Description: BOARD EVAL PREC CLOCK PLL XO
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LMK04000BEVALXO

• Main Purpose: Timing, Clock Conditioner
• Embedded: No
• Utilized Ic / Part: LMK04000
• Primary Attributes: 122.88 MHz Crystal
• Secondary Attributes: Integrated PLL & VCO
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LMK040x1B Phase Noise
Figure 17 - LMK040x1B Phase Noise
The Fout frequency is 1474.56 MHz. The clock out frequency is 737.28 MHz, and the clock out
div 4 frequency is 184.32 MHz. Note that the LVDS performance at 737.28 MHz is degraded
because it is outside of the balun’s operational bandwidth.
Table 15 - LMK040x1B Phase Noise (dBc/Hz)
Table 16 - LMK040x1B RMS Jitter; Integrated to from low limit to 20 MHz (rms fs)
100 kHz
100 kHz
10 MHz
40 MHz
Offset
100 Hz
100 Hz
10 kHz
10 kHz
Limit
1 MHz
Low
1 MHz
10 Hz
10 Hz
1 kHz
1 kHz
-100
-110
-120
-130
-140
-150
-160
-170
-50
-60
-70
-80
-90
10
-110.2
-116.3
-119.5
-131.1
-155.8
-164.2
506.6
117.5
111.3
108.0
-58.3
-88.3
Fout
Fout
92.7
36.2
L M K 0 4 0 X X - R E V 3
100
-115.3
-118.1
-122.0
-133.5
-148.2
-149.5
LVDS
LVDS LVPECL 2VPECL LVCMOS
538.4
178.3
174.2
169.5
147.7
-62.0
-96.4
72.9
LMK040x1B Phase Noise
1000
LVPECL 2VPECL LVCMOS
-115.7
-121.2
-124.7
-136.2
-152.3
-153.5
425.5
132.4
127.0
123.4
107.2
-65.4
-95.9
50.4
E V A L U A T I O N
10000
-115.8
-121.3
-124.7
-136.2
-152.3
-153.6
458.5
131.8
126.4
122.8
106.7
-66.4
-96.0
50.1
Offset (Hz)
30
100000 1000000 1000000
B O A R D
-116.2
-122.0
-125.5
-137.0
-151.7
-152.5
501.9
123.1
116.2
113.0
-63.4
-94.8
98.7
49.1
O P E R A T I N G
-106.7
-128.3
-132.8
-137.7
-148.5
-156.9
-157.5
LVDS
LVDS
532.2
141.0
135.1
132.4
120.7
-74.8
div4
85.2
div4
LVPECL
LVPECL
-107.7
-128.3
-134.0
-137.7
-148.7
-157.1
-157.3
445.6
138.6
133.3
130.7
119.0
-76.7
83.4
div4
div4
I N S T R U C T I O N S
0
2VPECL
2VPECL
Fout
LVDS
LVPECL
2VPECL
LVCMOS
LVDS; div4
LVPECL; div4
2VPECL; div4
LVCMOS; div4
-105.3
-128.1
-134.3
-137.8
-148.7
-157.5
-158.0
591.0
139.1
131.4
128.7
116.8
-73.8
80.3
div4
div4
1E+08
LVCMOS
LVCMOS
-106.7
-128.3
-134.7
-137.9
-148.9
-158.3
-158.8
544.1
132.5
125.5
122.8
110.8
-74.6
73.4
div4
div4