LMK04000BEVALXO National Semiconductor, LMK04000BEVALXO Datasheet - Page 14

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LMK04000BEVALXO

Manufacturer Part Number
LMK04000BEVALXO
Description
BOARD EVAL PREC CLOCK PLL XO
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of LMK04000BEVALXO

Main Purpose
Timing, Clock Conditioner
Embedded
No
Utilized Ic / Part
LMK04000
Primary Attributes
122.88 MHz Crystal
Secondary Attributes
Integrated PLL & VCO
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Evaluation Board Inputs/Outputs
The following table contains descriptions of the various inputs and outputs for the evaluation
board.
Table 5. LMK040xx Evaluation Board I/O
Connector Name
CLKout0*,
CLKout1*,
CLKout2*,
CLKout3*,
CLKout0 /
CLKout1 /
CLKout2 /
CLKout3 /
CLKout4 /
CLKout4*
VccLDO
Fout
Vcc
L M K 0 4 0 X X - R E V 3
Input/Output Description
Output
Output
Input
Input
E V A L U A T I O N
Populated connectors.
Differential clock output pairs. See Table 2 for format of
the output depending on part number. If an LVCMOS
output, each output can be independently configured (non-
inverted, inverted, tri-state, and LOW).
On the evaluation board, all clock outputs are AC-coupled
to allow safe testing with RF test equipment.
CLKout4 is configured with an on board balun. Part
number is Mini-circuits’ ADT2-1T. According to the
ADT2-1T datasheet the 3 dB frequency range is 0.4 to 450
MHz. See Appendix F: Balun Information for more detail.
Populated connector.
When enabled, buffered VCO output. AC-coupled. The
default configuration on the board contains a 3-dB
attenuator on the Fout signal.
Populated connector.
DC power supply for the PCB. Removing R1, R2, or R3
allow for splitting the power to various devices on the
board. For example, the VCXO is powered from the
VccAUXPlane connected via R3.
Note: The LMK04000 Family contains internal voltage
regulators for the VCO, PLL and related circuitry. The
clock outputs do not have an internal regulator. A clean
power supply is required for best performance.
Unpopulated connector.
Vcc input for LDOs on bottom of PCB. Refer to
schematics for more information.
• All LVPECL/2VPECL clock outputs are
terminated to GND with a 120 ohm resistor, one on
each output pin of the pair.
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B O A R D
O P E R A T I N G
I N S T R U C T I O N S

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