LMK04000BEVALXO National Semiconductor, LMK04000BEVALXO Datasheet - Page 16

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LMK04000BEVALXO

Manufacturer Part Number
LMK04000BEVALXO
Description
BOARD EVAL PREC CLOCK PLL XO
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of LMK04000BEVALXO

Main Purpose
Timing, Clock Conditioner
Embedded
No
Utilized Ic / Part
LMK04000
Primary Attributes
122.88 MHz Crystal
Secondary Attributes
Integrated PLL & VCO
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Connector Name
SYNC*
LD_TP
Vtune1
uWire
GOE
PTO
LD
L M K 0 4 0 X X - R E V 3
Input/Output Description
Input/Output
Output
Output
Output
Output
Input
Input
E V A L U A T I O N
Unpopulated connector.
Tuning voltage output from the loop filter for PLL1. If an
external VCXO is used, this tuning voltage should be
connected to the voltage control pin of the external VCXO.
Note: Resistor R38 must be populated with a zero ohm
resistor to control an off-board VCXO.
Populated connector.
10-pin header programming interface for the board. Of
Most important are the CLKuWire, DATAuWire, and
LEuWire programming lines from this header. Each of
these signals, GEO, and SYNC* can be monitored through
test points on the board.
Unpopulated connector.
The LD pin is attached to a multiplexer inside the device
and may be programmed with a variety of internal signals
for monitoring internal device functions and
troubleshooting. See datasheet for further explanation.
The lock detect signal is accessible through this pin.
Test point attached to the LD pin of the device. See LD
above for more information.
Unpopulated connector.
Access to GOE of device.
Unpopulated connector.
Access to SYNC* of device.
Unpopulated connector.
Vcc SMA located close to OSCin SMAs for powering
external oscillator boards.
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B O A R D
O P E R A T I N G
I N S T R U C T I O N S

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