DC-VIDEO-TVP5146N Altera, DC-VIDEO-TVP5146N Datasheet - Page 309
![VIDEO DAUGHTER CARD](/photos/9/6/90687/dc-video-tvp5146n_sml.jpg)
DC-VIDEO-TVP5146N
Manufacturer Part Number
DC-VIDEO-TVP5146N
Description
VIDEO DAUGHTER CARD
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.DC-VIDEO-TVP5146N.pdf
(58 pages)
Specifications of DC-VIDEO-TVP5146N
Main Purpose
Video, Daughter Card
Embedded
No
Utilized Ic / Part
Altera Dev Kits
Primary Attributes
Dual Composite Video Input - NTSC or PAL
Secondary Attributes
10-bit BT.656 Output, Compatible with Expansion Connector, Standard on Most Altera Development Kits
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1704
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- Download datasheet (4Mb)
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–139. EP3SE260 Column Pin Delay Adders for Regional Clock
Table 1–140. EP3SE260 Row Pin Delay Adders for Regional Clock
© July 2010 Altera Corporation
RCLK input adder
RCLK PLL input adder
RCLK output adder
RCLK PLL output adder
RCLK input adder
RCLK PLL input adder
RCLK output adder
RCLK PLL output adder
Parameter
Parameter
Table 1–139
that must be added to the GCLK values. Use these adder values to determine I/O
timing when the I/O pin is driven using the regional clock. This applies to all I/O
standards supported by Stratix III devices.
Table 1–139
clock.
Table 1–140
Stratix III devices.
Industrial
Industrial
-0.036
-0.204
0.233
1.899
-0.256
-0.134
0.244
0.124
Fast Model
Fast Model
and
lists the EP3SE260 column pin delay adders when using the regional
lists the EP3SE260 row pin delay adders when using the regional clock in
Commercial
Commercial
-0.237
0.311
1.965
0.028
-0.289
-0.147
0.293
0.134
Table 1–140
-0.334 -0.331 -0.413 -0.405
0.488
0.059
3.193
1.1 V
-0.418 -0.424 -0.484 -0.438 -0.591 -0.443 -0.464 -0.438 -0.591
-0.228 -0.233 -0.254 -0.261 -0.322 -0.236 -0.262 -0.261 -0.322
V
1.1 V
0.438
V
C2
0.21
CCL
C2
CCL
list the EP3SE260 regional clock (RCLK) adder values
=
=
0.489
3.323
1.1 V
0.412
0.215
V
0.06
1.1 V
V
C3
CCL
C3
CCL
=
=
0.113
3.677
1.1 V
V
0.45
0.471
0.234
1.1 V
V
C4
CCL
C4
CCL
=
=
0.439
3.512
1.1 V
V
0.11
0.427
0.228
1.1 V
V
CCL
CCL
=
=
C4L
C4L
-0.005 -0.038
0.515
3.802
-0.44
0.9 V
V
0.577
0.297
0.9 V
V
CCL
CCL
Stratix III Device Handbook, Volume 2
=
=
0.416
3.346
-0.32
1.1 V
V
0.421
0.217
1.1 V
V
I3
CCL
I3
CCL
=
=
-0.371
0.458
0.121
3.705
1.1 V
0.452
0.239
V
1.1 V
V
I4
CCL
I4
CCL
=
=
-0.405
0.439
3.512
0.427
0.228
1.1 V
1.1 V
V
0.11
V
CCL
CCL
1–309
=
=
I4L
I4L
-0.005
0.577
0.297
0.515
3.802
0.9 V
-0.44
V
0.9 V
V
CCL
CCL
=
=
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
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