C8051F700-TB Silicon Laboratories Inc, C8051F700-TB Datasheet - Page 184

• Manufacturer Part Number: C8051F700-TB
• Description: BOARD PROTOTYPE WITH C8051F700
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F700-TB

• Accessory Type: Target Board
• Processor To Be Evaluated: C8051F700
• Processor Series: C8051F7xx
• Interface Type: USB
• Operating Supply Voltage: 7 V to 15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F7xx
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1637; C8051F700

C8051F70x/71x
28.2.2. Assigning Port I/O Pins to Digital Functions
Any Port pins not assigned to analog functions may be assigned to digital functions or used as GPIO. Most
digital functions rely on the Crossbar for pin assignment; however, some digital functions bypass the
Crossbar in a manner similar to the analog functions listed above. Port pins used by these digital func-
tions and any Port pins selected for use as GPIO should have their corresponding bit in PnSKIP set
to 1. Table 28.2 shows all available digital functions and the potential mapping of Port I/O to each digital
function.
28.2.3. Assigning Port I/O Pins to External Event Trigger Functions
External event trigger functions can be used to trigger an interrupt or wake the device from a low power
mode when a transition occurs on a digital I/O pin. The event trigger functions do not require dedicated
pins and will function on both GPIO pins (PnSKIP = 1) and pins in use by the Crossbar (PnSKIP = 0).
External event trigger functions cannot be used on pins configured for analog I/O. Table 28.3 shows all
available external event trigger functions.
184
Digital Function
UART0, SPI0, SMBus, CP0,
CP0A, SYSCLK, PCA0
(CEX0-2 and ECI), T0 or T1.
Any pin used for GPIO
External Memory Interface
Event Trigger Function
External Interrupt 0
External Interrupt 1
Port Match
Table 28.3. Port I/O Assignment for External Event Trigger Functions
Table 28.2. Port I/O Assignment for Digital Functions
Any Port pin available for assignment by the
Crossbar. This includes P0.0–P2.7 pins which
have their PnSKIP bit set to 0.
Note: The Crossbar will always assign UART0
pins to P0.4 and P0.5.
Potentially Assignable Port Pins
Potentially Assignable Port Pins
Rev. 1.0
P0.0–P6.5
P3.0–P6.2
P0.0–P0.7
P0.0–P0.7
P0.0–P1.7
P0MASK, P0MAT
P1MASK, P1MAT
P0SKIP, P1SKIP,
SFR(s) used for
SFR(s) used for
Assignment
XBR0, XBR1
Assignment
EMI0CF
P2SKIP
IT01CF
IT01CF