MT4LSDT864AY-13EG2 Micron Technology Inc, MT4LSDT864AY-13EG2 Datasheet - Page 21

• Manufacturer Part Number: MT4LSDT864AY-13EG2
• Description: MODULE SDRAM 64MB 168-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT4LSDT864AY-13EG2

• Memory Type: SDRAM
• Memory Size: 64MB
• Speed: 133MHz
• Package / Case: 168-DIMM
• Main Category: DRAM Module
• Sub-category: SDRAM
• Module Type: 168UDIMM
• Device Core Size: 64b
• Organization: 8Mx64
• Total Density: 64MByte
• Chip Density: 128Mb
• Access Time (max): 5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Current: 660mA
• Number Of Elements: 4
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 65C
• Operating Temperature Classification: Commercial
• Pin Count: 168
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PDF: 09005aef8078bc7c/Source: 09005aef8078bcd3
SD4C4_8_16X64AG.fm - Rev. D 1/07 EN
23. The clock frequency must remain constant (stable clock is defined as a signal cycling
24. Auto precharge mode only. The precharge timing budget (
25. Precharge mode only.
26. JEDEC and PC100 specify three clocks.
27.
28. Parameter guaranteed by design.
29. For -13E, CL = 2 and
30. CKE is HIGH during refresh command period
31. Refer to device data sheet for timing waveforms.
32. The value of
33. Leakage number reflects the worst-case leakage possible through the module pin, not
within timing constraints specified for the clock pin) during access or precharge
states (READ, WRITE, including
to reduce the data rate.
7.5ns for -133; and 7ns for -10E after the first clock delay, after the last WRITE is exe-
cuted. May not exceed limit set for precharge mode.
t
t
limit is actually a nominal value and does not result in a fail value.
what each memory device contributes.
AC for -133/-13E at CL = 3 with no load is 4.6ns and is guaranteed by design.
CK = 10ns.
t
RAS used in -13E speed grade modules is calculated from
32MB, 64MB, 128MB (x64, SR) 168-Pin SDRAM UDIMM
t
CK = 7.5ns; for -133, CL = 3 and
21
t
WR and PRECHARGE commands). CKE may be used
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RFC (MIN), else CKE is LOW. The I
t
CK = 7.5ns; for -10E, CL = 2 and
t
RP) begins 7ns for -13E;
©2002 Micron Technology, Inc. All rights reserved.
t
RC -
t
RP.
Notes
DD
6