MT9HTF6472AY-40ED4 Micron Technology Inc, MT9HTF6472AY-40ED4 Datasheet - Page 23

MODULE DDR2 512MB 240-DIMM

MT9HTF6472AY-40ED4

Manufacturer Part Number
MT9HTF6472AY-40ED4
Description
MODULE DDR2 512MB 240-DIMM
Manufacturer
Micron Technology Inc

Specifications of MT9HTF6472AY-40ED4

Memory Type
DDR2 SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
240-DIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
64Mx72
Total Density
512MByte
Chip Density
512Mb
Access Time (max)
60ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.035A
Number Of Elements
9
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Extended Mode Register 3 (EMR3)
Figure 11:
pdf: 09005aef80e6f860, source: 09005aef80e5b799
HTF9C32_64_128x72AG_2.fm - Rev. C 6/05 EN
Extended Mode Register 3 (EMR3) Definition
The Extended Mode Register 3 (EMR3) controls functions beyond those controlled by
the mode register. Currently all bits in EMR3 are reserved as shown in Figure 11,
Extended Mode Register 3 (EMR3) Definition. The EMR3 is programmed via the LOAD
MODE command and will retain the stored information until it is programmed again or
the device loses power. Reprogramming the extended mode register will not alter the
contents of the memory array, provided it is performed correctly.
The extended mode register must be loaded when all banks are idle and no bursts are in
progress, and the controller must wait the specified time
sequent operation. Violating either of these requirements could result in unspecified
operation.
256MB Address Bus
512MB Address Bus
1GB Address Bus
0*
BA2
16
* E12 (A12)–E0 (A0) are reserved for future use and must all be programmed to '0.'
* E13 (A13)–E0 (A0) are reserved for future use and must all be programmed to '0.'
E15
BA1
15
EMR3
BA1
15
256MB, 512MB, 1GB (x72, SR, ECC) 240-Pin DDR2 SDRAM UDIMM
EMR3
0
0
1
1
14
BA1
14
BA0
14
EMR3 0* 0*
E14
BA0
0
1
0
1
0*
13
13
0*
BA0
A13
13
A13
Extended Mode Register (EMR2)
Extended Mode Register (EMR3)
Extended Mode Register (EMR)
0* 0*
12
12
0* 0*
A12 A11
A12 A11
12
Mode Register Set (MRS)
A12 A11
Mode Register Set
11
11
11
0*
0*
0*
10
10
10
A10
A10
A10
0* 0* 0* 0* 0* 0* 0* 0*
0* 0* 0* 0* 0* 0* 0* 0*
0* 0* 0* 0* 0* 0* 0* 0*
9
9
A9
A9
9
A9
8
8
A8
A8
8
A8
7
7
A7 A6 A5 A4 A3
A7 A6 A5 A4 A3
7
A7 A6 A5 A4 A3
6
6
6
5
5
* E16 and E13 (A13) - E0 (A0) are reserved for future
5
23
4
4
4
use and must all be programmed to '0'.
3
3
3
2
2
2
A2 A1 A0
A2 A1 A0
A2 A1 A0
0* 0*
0* 0*
0* 0*
1
1
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
0
0
Extended Mode
Register (Ex)
Extended Mode
Register (Ex)
Extended Mode
Register (Ex)
Address Bus
Address Bus
Address Bus
Extended Mode Register 3 (EMR3)
©2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
t
MRD before initiating any sub-

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