IDT88K8483BRI IDT, Integrated Device Technology Inc, IDT88K8483BRI Datasheet - Page 109
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IDT88K8483BRI
Manufacturer Part Number
IDT88K8483BRI
Description
IC SPI-4 EXCHANGE 3PORT 672-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT88K8483BRI.pdf
(162 pages)
Specifications of IDT88K8483BRI
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
88K8483BRI
- Current page: 109 of 162
- Download datasheet (3Mb)
SPI-4 Ingress Diagnostics Register
SPI-4 Ingress Automatic Alignment Control Register
SPI4 Ingress Calendar Switch Control Register
I_FORCE_TRAIN
I_ERR_INS
I_DIP_NUM
Note: The purpose of the status channel training sequence is for the deskew of status and clock signals and for the alignment between the 2 status signals.
AUTO_ALIGN
IDT IDT88K8483
I_CSW_EN
CAL_SEL
I_DIP_CSW
Note: Refer to the OIF SPI-4 implementation agreement (OIF-SPI-4-02.1) for more details about calendar implementation.
Field
Field
Field
Table 64
Table 65 SPI-4 Ingress Calendar Switch Control Register (Block base=0x0300, Register Offset=0x08)
SPI-4 Ingress Automatic Alignment Control Register (Block base=0x0300, Register Offset=0x07)
Table 63
R/W
R/W
R/W
R/W
Read /
Read /
Write
Write
R/W
R/W
R/W
Read /
Write
SPI-4 Ingress Diagnostics Register (Block base=0x0300, Register Offset=0x06)
0:1
0:0
0:0
0:2-0:5
0:0
0:1
0:2
Bits
Bits
Bits
1
1
4
1
Length
Length
1
1
1
Length
0
0
0
0
Reset
Reset
State
State
0
0
1
Reset
State
109 of 162
This field is used to force continuous training on the SPI-4 ingress status interface.
0:Normal status channel operation.
1:Force continuous training on the SPI-4 ingress status interface.
This field is used to insert the number of DIP-2 errors on the SPI-4 ingress status
interface programmed into the I_DIP_NUM field. After the DIP-2 errors are inserted,
the I_ERR_INS field will clear itself.
0:Normal status channel operation.
1:Insert DIP-2 errors on the SPI-4 ingress status interface.
This field is used to program the number of DIP-2 errors to be inserted when the
field I_ERR_INS is set to ‘1’. The number programmed should be less than 16.
This field enables or disables automatic alignment for the incoming LVDS data bits
in the data path. This register is used for test purposes.
0:Auto alignment is used for test mode.
1:Auto alignment is automatic.
The I_CSW_EN field is used to enable the switching of active calendars and
works together with CAL_SEL.Refer to Table 66 for calendar selection.
This field is used to select calendar_0 or calendar_1. This bit is valid only if
I_CSW_EN is set to 1. Refer to Table 66 for calendar selection.
This field describes the DIP-2 computation method based on the setting of
I_CSW_EN.Please refer toTable 67 for bit setting.
Description
Description
Description
October 20, 2006
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