IDT88P8342BHGI IDT, Integrated Device Technology Inc, IDT88P8342BHGI Datasheet - Page 23

• Manufacturer Part Number: IDT88P8342BHGI
• Description: IC SPI3-SPI4 EXCHANGE 820-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT88P8342BHGI

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 88P8342BHGI

4. DATAPATH AND FLOW CONTROL
datapaths shown are as follows:
Both SPI-3 interfaces can operate independently in a PHY or Link mode. Refer
to Figure 11, Definition of Data Flows for the main data flows in the device.
Independent logical data flows are transported over each of the physical ports.
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
The following sections describe the datapaths through the device. The
- SPI-3A <-> SPI-4
- SPI-3B <-> SPI-4
- SPI-3A <-> SPI-3B
- SPI-3A <-> microprocessor interface
- SPI-3B <-> microprocessor interface
- SPI-4 <-> microprocessor interface
Where <-> indicates a bidirectional data path.
The IDT88P8342 supports two SPI-3 interfaces and a single SPI-4 interface.
SPI-3B physical port
SPI-3A physical port
SPI-3 ingress
SPI-3 egress
from SPI-3
to SPI-3
Figure 11. Definition of data flows
SPI-4 insert
SPI-4 extract
SPI-4-3 path
SPI-3-4 path
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Those logical flows are identified by logical port addresses on the physical port
and by a Link identification (LID) map in the core of the IDT88P8342.
DATA BUFFER ALLOCATION
has 128 KByte of on chip memory per SPI-3 port per direction – a total of 1MByte
of on-chip data memory.
256 byte segments. The segments are controlled by a packet fragment
processor. The user configures the maximum number of segments per LP to
allocate to a port and the number of segments allocated from the buffer segment
pool that will trigger the flow control mechanism. There is no limitation on the
reallocation of freed segments among logical ports, as would be present if the
memory had been allocated by a simple address mechanism.
Flexibility has been provided to the user for data buffer allocation. The device
The 128 KByte SPI-3 buffers (four instantiations per device) are divided into
SPI-3 extract
SPI-3 insert
SPI-4 egress
SPI-4 ingress
to SPI-4
from SPI-4
INDUSTRIAL TEMPERATURE RANGE
6371 drwXA
SPI-4
physical
port
APRIL 10, 2006