LTC3890EGN-1#TRPBF Linear Technology, LTC3890EGN-1#TRPBF Datasheet - Page 24

IC BUCK SYNC ADJ DUAL 28SSOP

LTC3890EGN-1#TRPBF

Manufacturer Part Number
LTC3890EGN-1#TRPBF
Description
IC BUCK SYNC ADJ DUAL 28SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3890EGN-1#TRPBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.8 ~ 24 V
Frequency - Switching
350kHz ~ 535kHz
Voltage - Input
4 ~ 60 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Power - Output
-
LTC3890-1
The minimum on-time for the LTC3890-1 is approximately
90ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases up to about TBDns.
This is of particular concern in forced continuous applica-
tions with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
a significant amount of cycle skipping can occur with cor-
respondingly larger current and voltage ripple.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3890-1 circuits: 1) IC V
regulator current, 3) I
transition losses.
1. The V
2. INTV
APPLICATIONS INFORMATION
24
%Efficiency = 100% – (L1 + L2 + L3 + ...)
Electrical Characteristics table, which excludes MOSFET
driver and control currents. V
in a small (<0.1%) loss.
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge, dQ, moves
from INTV
out of INTV
control circuit current. In continuous mode, I
= f(Q
the topside and bottom side MOSFETs.
Supplying INTV
through EXTV
the driver and control circuits by a factor of (Duty Cycle)/
CC
T
IN
+ Q
current is the sum of the MOSFET driver and
current is the DC supply current given in the
CC
B
), where Q
CC
to ground. The resulting dQ/dt is a current
CC
CC
that is typically much larger than the
will scale the V
from an output-derived source power
2
T
R losses, 4) topside MOSFET
and Q
IN
B
current typically results
are the gate charges of
IN
IN
current required for
current, 2) INTV
GATECHG
CC
3. I
4. Transition losses apply only to the topside MOSFET(s),
(Efficiency). For example, in a 20V to 5V application,
10mA of INTV
of V
10% or more (if the driver was powered directly from
V
fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current flows through L and
R
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
of one MOSFET can simply be summed with the resis-
tances of L, R
example, if each R
= 10mΩ and R
output capacitance losses), then the total resistance
is 130mΩ. This results in losses ranging from 3% to
13% as the output current increases from 1A to 5A for
a 5V output, or a 4% to 20% loss for a 3.3V output.
Efficiency varies as the inverse square of V
same external components and output power level. The
combined effects of increasingly lower output voltages
and higher currents required by high performance digital
systems is not doubling but quadrupling the importance
of loss terms in the switching regulator system!
and become significant only when operating at high
input voltages (typically 15V or greater). Transition
losses can be estimated from:
Other hidden losses such as copper trace and internal
battery resistances can account for an additional 5%
to 10% efficiency degradation in portable systems. It
is very important to include these system level losses
during the design phase. The internal battery and fuse
resistance losses can be minimized by making sure that
C
the switching frequency. A 25W supply will typically
require a minimum of 20μF to 40μF of capacitance
having a maximum of 20mΩ to 50mΩ of ESR. The
LTC3890-1 2-phase architecture typically halves this
2
IN
IN
SENSE
R losses are predicted from the DC resistances of the
Transition Loss = (1.7) • V
) to only a few percent.
has adequate charge storage and very low ESR at
IN
current. This reduces the midcurrent loss from
, but is chopped between the topside MOSFET
CC
SENSE
ESR
current results in approximately 2.5mA
DS(ON)
= 40mΩ (sum of both input and
and ESR to obtain I
= 30mΩ, R
DS(ON)
IN
• 2 • I
, then the resistance
L
O(MAX)
= 50mΩ, R
2
R losses. For
OUT
• C
RSS
for the
SENSE
38901fa
• f

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