LTC3890EGN-1#TRPBF Linear Technology, LTC3890EGN-1#TRPBF Datasheet - Page 18

• Manufacturer Part Number: LTC3890EGN-1#TRPBF
• Description: IC BUCK SYNC ADJ DUAL 28SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3890EGN-1#TRPBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 24 V
• Frequency - Switching: 350kHz ~ 535kHz
• Voltage - Input: 4 ~ 60 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -

LTC3890-1
usually provided on the MOSFET manufacturers’ data
sheet. C
along the horizontal axis while the curve is approximately
flat divided by the specified change in V
then multiplied by the ratio of the application applied V
to the Gate charge curve specified V
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
The MOSFET power dissipations at maximum output
current are given by:
where δ is the temperature dependency of R
R
at the MOSFET’s Miller threshold voltage. V
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
the high current efficiency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
APPLICATIONS INFORMATION
18
DR
Main Switch Duty Cycle =
P
P
Synchronous Switch Duty Cycle =
MAIN
SYNC
(approximately 2Ω) is the effective driver resistance
MILLER
=
=
⎡
⎢
⎣
( )
V
MILLER
V
V
V
V
OUT
IN
IN
INTVCC
IN
– V
is equal to the increase in gate charge
V
2
IN
(
⎛
⎜
⎝
I
actually provides higher efficiency. The
MAX
OUT
I
MAX
2
1
– V
IN
2
R losses while the topside N-channel
)
> 20V the transition losses rapidly
(
2
I
THMIN
⎞
⎟ R
⎠
MAX
(
(
1+ δ
DR
)
2
V
)
)
+
(
V
OUT
R
(
1+ δ
C
IN
V
DS(ON)
MILLER
THMIN
1
)
DS
R
. When the IC is
V
DS(ON)
DS
+
IN
⎤
⎥ f
⎦
)
( )
. This result is
•
− V
V
DS(ON)
THMIN
IN
DS(ON)
OUT
IN
device
< 20V
is the
and
DS
The term (1+ δ) is generally given for a MOSFET in the
form of a normalized R
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D3 and D4 shown in
Figure 11 conduct during the dead-time between the
conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on,
storing charge during the dead-time and requiring a
reverse recovery period that could cost as much as 3%
in efficiency at high V
a good compromise for both regions of operation due
to the relatively small average current. Larger diodes
result in additional transition losses due to their larger
junction capacitance.
C
The selection of C
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V
formula shown in Equation 1 to determine the maximum
RMS capacitor current requirement. Increasing the out-
put current drawn from the other controller will actually
decrease the input RMS ripple current from its maximum
value. The out-of-phase technique typically reduces the
input capacitor’s RMS ripple current by a factor of 30%
to 70% when compared to a single phase power supply
solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
This formula has a maximum at V
= I
used for design because even significant deviations do not
C
IN
IN
OUT
and C
Required I
/2. This simple worst-case condition is commonly
OUT
Selection
OUT
RMS
)(I
IN
is simplified by the 2-phase architec-
OUT
≈
IN
I
MAX
DS(ON)
V
. A 1A to 3A Schottky is generally
) product needs to be used in the
IN
⎡
⎣
(
V
vs Temperature curve, but
OUT
IN
OUT
)
= 2V
(
V
)/(V
IN
OUT
– V
IN
). To prevent
OUT
, where I
)
⎤
⎦
1/ 2
38901fa
RMS
(1)