FAN7392MX Fairchild Semiconductor, FAN7392MX Datasheet - Page 5

• Manufacturer Part Number: FAN7392MX
• Description: IC GATE DVR MONO HI/LO 16SOP
• Manufacturer: Fairchild Semiconductor
• Type: High Side/Low Sider

Specifications of FAN7392MX

• Configuration: Half Bridge
• Input Type: Non-Inverting
• Delay Time: 130ns
• Current - Peak: 3A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 600V
• Voltage - Supply: 10 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Product: H-Bridge Drivers
• Rise Time: 50 ns
• Fall Time: 45 ns
• Supply Voltage (min): 3.3 V
• Supply Current: 0.43 mA
• Maximum Power Dissipation: 1300 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Bridge Type: Full Bridge, Half Bridge
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FAN7392MXTR

© 2009 Fairchild Semiconductor Corporation
FAN7392 Rev. 1.0.3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T
Notes:
1. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
2. Refer to the following standards:
3. Do not exceed power dissipation (P
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Symbol
dV
JESD51-2: Integral circuits thermal test method environmental conditions, natural convection; and
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.
T
V
V
V
V
V
V
V
V
V
V
V
V
θ
V
V
V
V
P
T
T
STG
HO
HO
CC
LO
DD
SS
CC
DD
S
JA
LO
SS
IN
IN
A
D
B
S
B
S
J
/dt
High-Side Floating Supply Voltage
High-Side Floating Supply Offset Voltage
High-Side Output Voltage
Low-Side Supply Voltage
Low-Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage
Operating Ambient Temperature
High-Side Floating Supply Voltage
High-Side Floating Offset Voltage
High-Side Floating Output Voltage
Low-Side Supply Voltage
Low-Side Floating Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN and SD)
Allowable Offset Voltage Slew Rate
Power Dissipation
Thermal Resistance
Maximum Junction Temperature
Storage Temperature
(1, 2, 3)
Characteristics
D
) under any circumstances.
Parameter
A
=25°C unless otherwise specified.
5
14-PDIP
14-PDIP
16-SOP
16-SOP
V
V
6-V
Min.
V
V
S
SS
-40
V
V
V
10
-5
V
CC
+10
0
SS
Min.
B
SS
S
CC
-0.3
-0.3
-0.3
-0.3
S
+3
-55
-25.0
-0.3
-25.0
-0.3
V
V
V
Max.
+125
SS
V
V
V
V
V
S
600
V
V
V
SS
20
Max.
625.0
CC
CC
DD
5
+150
+150
+20
CC
DD
25.0
B
B
+20
±50
B
1.6
1.3
75
95
+25.0
+0.3
+0.3
+0.3
+0.3
+0.3
www.fairchildsemi.com
Unit
°C/W
Unit
°C
V/ns
V
V
V
V
V
V
V
V
°C
°C
W
V
V
V
V
V
V
V
V