CY7C1550V18-375BZC Cypress Semiconductor Corp, CY7C1550V18-375BZC Datasheet - Page 23

• Manufacturer Part Number: CY7C1550V18-375BZC
• Description: IC SRAM 72MBIT 375MHZ 165TFBGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1550V18-375BZC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, DDR II
• Memory Size: 72M (2M x 36)
• Speed: 375MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 165-TFBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Switching Waveforms
Read/Write/Deselect Sequence
Notes
Document Number: 001-06550 Rev. *D
28. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, that is, A0 + 1.
29. Outputs are disabled (High-Z) one clock cycle after a NOP.
30. The third NOP cycle between read to write transition is not necessary for correct device operation when Read Latency = 2.0 cycles; however at high frequency operation,
QVLD
it is required to avoid bus contention.
R/W
DQ
CQ
CQ
LD
A
K
K
NOP
1
t KH
(Read Latency = 2.0 Cycles)
t KL
t
t SA t HA
SC
A0
READ
2
t HC
t CYC
A1
t
QVLD
3
READ
t
t CQOH
KHKH
[28, 29, 30]
t
CLZ
t CQOH
Figure 5. Waveform for 2.0 Cycle Read Latency
4
NOP
t CO
Q00
t CCQO
Q01 Q10
t
t
CCQO
QVLD
NOP
5
t DOH
Q11
t
t CQD
CQDOH
NOP
6
t
CHZ
A2
WRITE
7
t SD
t HD
D20 D21
A3
WRITE
8
t CQH
t SD
D30
A4
9
READ
t
CQHCQH
D31
t
HD
DON’T CARE
t
QVLD
10
NOP
CY7C1546V18
CY7C1557V18
CY7C1548V18
CY7C1550V18
11
NOP
UNDEFINED
Page 23 of 27
Q40 Q41
12
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