MT46H8M16LFCF-10 IT Micron Technology Inc, MT46H8M16LFCF-10 IT Datasheet - Page 59
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MT46H8M16LFCF-10 IT
Manufacturer Part Number
MT46H8M16LFCF-10 IT
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H8M16LFCF-10 IT
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 37:
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
COMMAND
BA0, BA1
A11, A11
A0–A9,
DQS
A10
DM
DQ
CK#
CKE
CK
5
5
5
1
1
1
1
t
t
IS
IS
NOP 2
T0
Auto Refresh Mode
t
t
IH
IH
Notes:
ALL BANKS
ONE BANK
t
Bank(s) 4
IS
PRE
T1
t
IH
2. NOP commands are shown for ease of illustration; other valid commands may be possible at
3. NOP or COMMAND INHIBIT are the only commands allowed until after
4. “Don’t Care” if A10 is HIGH at this point; A10 must be HIGH if more than one bank is active
5. DM, DQ, and DQS signals are all “Don’t Care”/High-Z for operations shown.
6. The second AUTO REFRESH is not required and is only shown as an example of two back-to-
1. PRE = PRECHARGE, ACT = ACTIVE, AR = AUTO REFRESH, RA = Row address, BA = Bank
CK
address.
these times. CKE must be active during clock positive transitions.
be active during clock positive transitions.
(i.e., must precharge all active banks).
back AUTO REFRESH commands.
VALID
NOP 2
T2
t
CH
t RP
t
CL
NOP 2
T3
59
T4
AR
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128Mb: 8 Meg x 16 Mobile DDR SDRAM
t RFC
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP 2, 3
Ta0
Ta1
AR 6
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VALID
NOP 2, 3
Tb0
©2006 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t
t RFC 6
RFC time, CKE must
NOP 2
Tb1
DON’T CARE
Advance
Tb2
ACT
RA
RA
BA