MT46H8M16LFCF-10 IT Micron Technology Inc, MT46H8M16LFCF-10 IT Datasheet - Page 44
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MT46H8M16LFCF-10 IT
Manufacturer Part Number
MT46H8M16LFCF-10 IT
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H8M16LFCF-10 IT
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with auto
11. Requires appropriate DM masking.
12.
5. The following states must not be interrupted by any executable command; DESELECT or
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle, and bursts are not in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must be in a
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of
NOP commands must be applied on each positive clock edge during these states.
valid state for precharging.
bank.
precharge enabled and READs or WRITEs with auto precharge disabled.
A WRITE command may be applied after the completion of the READ burst; otherwise,
a BURST TERMINATE must be used to end the READ burst prior to asserting a WRITE
command.
Accessing mode
Precharging all: Starts with registration of a PRECHARGE ALL command and ends
Refreshing: Starts with registration of an AUTO REFRESH command and ends
register:
when
all banks idle state.
Starts with registration of a LOAD MODE REGISTER command and
ends when
SDRAM will be in the all banks idle state.
when
44
t
t
RFC is met. Once
RP is met. Once
t
128Mb: 8 Meg x 16 Mobile DDR SDRAM
MRD has been met. Once
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RP is met, all banks will be in the idle state.
t
RFC is met, the DDR SDRAM will be in the
t
MRD is met, the Mobile DDR
©2006 Micron Technology, Inc. All rights reserved.
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