PSD834F2-90J STMicroelectronics, PSD834F2-90J Datasheet - Page 59

• Manufacturer Part Number: PSD834F2-90J
• Description: IC FLASH 2MBIT 90NS 52PLCC
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-90J

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-2006-5

Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure 29):
■
■
■
■
■
Figure 29. Port C Structure
MCU I/O Mode
CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
CPLD Input – via the Input Macrocells (IMC)
Address In – Additional high address inputs
using the Input Macrocells (IMC).
In-System Programming (ISP) – JTAG port
can be enabled for programming/erase of the
WR
MCELLBC [ 7:0 ]
WR
ENABLE PRODUCT TERM ( .OE )
CPLD-INPUT
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
Doc ID 10552 Rev 3
DATA IN
SPECIAL FUNCTION
DATA OUT
■
Port C does not support Address Out mode, and
therefore no Control Register is required.
Pin PC7 may be configured as the DBE input in
certain MCU bus interfaces.
1
PSD device. (See the section entitled
PROGRAMMING IN-CIRCUIT USING THE
JTAG SERIAL INTERFACE, page 69
more information on JTAG programming.)
Open Drain – Port C pins can be configured in
Open Drain Mode
SPECIAL FUNCTION
OUTPUT
OUTPUT
SELECT
MUX
ENABLE OUT
MACROCELL
INPUT
PSD813F2V, PSD854F2V
CONFIGURATION
PORT C PIN
BIT
AI02888B
for
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