IS61LF25636A-7.5TQLI ISSI, Integrated Silicon Solution Inc, IS61LF25636A-7.5TQLI Datasheet - Page 7
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IS61LF25636A-7.5TQLI
Manufacturer Part Number
IS61LF25636A-7.5TQLI
Description
IC SRAM 9MBIT 7.5NS 100TQFP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet
1.IS61LF25636A-7.5TQLI-TR.pdf
(32 pages)
Specifications of IS61LF25636A-7.5TQLI
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Density
9Mb
Access Time (max)
7.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
117MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
4
Supply Current
185mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
256K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1093
IS61LF25636A-7.5TQLI
IS61LF25636A-7.5TQLI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS61LF25636A-7.5TQLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Company:
Part Number:
IS61LF25636A-7.5TQLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Note: * A
IS61/64LF25636A IS61LF51218A IS61VF25636A IS61VF51218A
Integrated Silicon Solution, Inc.
Rev. H
07/22/2010
PIN DESCRIPTIONS
165 PBGA PACKAGE PIN CONFIGURATION
512k
Symbol
A
A0, A1
ADV
ADSP
ADSC
GW
CLK
CE, CE2, CE2
BWx (x=a,b)
M
A
B
C
D
G
H
K
N
R
E
F
J
L
P
x
0
and A
18 (TOP VIEW)
MODE
DQPb
DQb
DQb
DQb
DQb
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
1
are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
Pin Name
Address Inputs
Synchronous Burst Address Inputs
Synchronous Burst Address
Advance
Address Status Processor
Address Status Controller
Global Write Enable
Synchronous Clock
Synchronous Chip Select
Synchronous Byte Write
Controls
DQb
DQb
DQb
DQb
Vss
NC
NC
NC
NC
NC
NC
NC
NC
A
A
2
V
V
V
V
V
V
V
V
V
V
CE2
CE
NC
ddq
ddq
ddq
ddq
ddq
ddq
ddq
ddq
ddq
ddq
A
A
3
BWb
Vss
V
V
V
V
V
V
V
V
V
Vss
NC
A
A
4
dd
dd
dd
dd
dd
dd
dd
dd
dd
BWa
TMS
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
TDI
NC
NC
5
CE2
CLK
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
A
A
NC
6
1
0
*
*
Symbol
BWE
OE
ZZ
MODE
TCK, TDO
TMS, TDI
NC
DQx
DQPx
V
V
Vss
dd
ddq
BWE
TDO
TCK
GW
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
NC
7
ADSC
Vss
V
V
V
V
V
V
V
V
V
Vss
Pin Name
OE
A
8
A
dd
dd
dd
dd
dd
dd
dd
dd
dd
Byte Write Enable
Output Enable
Power Sleep Mode
Burst Sequence Selection
JTAG Pins
No Connect
Data Inputs/Outputs
Data Inputs/Outputs
3.3V/2.5V Power Supply
Isolated Output Power Supply
3.3V/2.5V
Ground
ADSP
V
V
V
V
V
V
V
V
V
V
ADV
Nc
ddq
ddq
ddq
ddq
ddq
ddq
ddq
ddq
ddq
ddq
A
A
9
dqa
dqa
dqa
dqa
Nc
NC
NC
NC
NC
Nc
NC
10
A
A
A
A
DQPa
DQa
DQa
DQa
DQa
NC
Nc
Nc
Nc
Nc
NC
ZZ
11
A
A
A
7