IS61LF25636A-7.5TQLI ISSI, Integrated Silicon Solution Inc, IS61LF25636A-7.5TQLI Datasheet - Page 5
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IS61LF25636A-7.5TQLI
Manufacturer Part Number
IS61LF25636A-7.5TQLI
Description
IC SRAM 9MBIT 7.5NS 100TQFP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet
1.IS61LF25636A-7.5TQLI-TR.pdf
(32 pages)
Specifications of IS61LF25636A-7.5TQLI
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Density
9Mb
Access Time (max)
7.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
117MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
4
Supply Current
185mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
256K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1093
IS61LF25636A-7.5TQLI
IS61LF25636A-7.5TQLI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS61LF25636A-7.5TQLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Company:
Part Number:
IS61LF25636A-7.5TQLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
IS61/64LF25636A IS61LF51218A IS61VF25636A IS61VF51218A
Note: * A
Integrated Silicon Solution, Inc.
Rev. H
07/22/2010
119 BGA PACKAGE PIN CONFIGURATION
512k
PIN DESCRIPTIONS
Symbol
A
A0, A1
ADV
ADSP
ADSC
GW
CLK
CE, CE2
BWx (x=a,b) Synchronous Byte Write Controls
BWE
M
A
B
C
D
G
H
K
N
R
U
E
F
L
P
T
J
x
18 (TOP VIEW)
0
and A
V
V
V
V
V
1
DQb
DQb
DQb
DQb
are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
NC
NC
NC
NC
NC
NC
NC
NC
DDQ
DDQ
DDQ
DDQ
DDQ
1
Pin Name
Address Inputs
Synchronous Burst Address Inputs
Synchronous Burst Address
Advance
Address Status Processor
Address Status Controller
Global Write Enable
Synchronous Clock
Synchronous Chip Select
Byte Write Enable
DQPb
DQb
DQb
DQb
DQb
TMS
CE2
V
NC
NC
NC
NC
NC
A
A
A
2
A
DD
MODE
BWb
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
TDI
NC
A
A
A
A
3
ADSC
ADSP
BWE
ADV
TCK
CLK
V
GW
V
V
NC
CE
OE
NC
A
A
NC
4
DD
DD
DD
1
0
*
*
BWa
TDO
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
NC
NC
A
A
A
A
5
Symbol
OE
ZZ
MODE
TCK, TDO
TMS, TDI
NC
DQa-DQb
DQPa-Pb
V
V
Vss
dd
ddq
DQPa
DQa
DQa
DQa
DQa
V
NC
NC
NC
NC
NC
NC
A
A
A
A
A
6
DD
Pin Name
Output Enable
Power Sleep Mode
Burst Sequence Selection
JTAG Pins
No Connect
Data Inputs/Outputs
Output Power Supply
Power Supply
Output Power Supply
Ground
V
V
V
V
V
DQa
DQa
DQa
DQa
NC
NC
NC
NC
NC
NC
NC
ZZ
DDQ
DDQ
DDQ
DDQ
DDQ
7
5