IS61LF25636A-7.5TQLI ISSI, Integrated Silicon Solution Inc, IS61LF25636A-7.5TQLI Datasheet - Page 25

• Manufacturer Part Number: IS61LF25636A-7.5TQLI
• Description: IC SRAM 9MBIT 7.5NS 100TQFP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS61LF25636A-7.5TQLI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 9M (256K x 36)
• Speed: 7.5ns
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Density: 9Mb
• Access Time (max): 7.5ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 117MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 4
• Supply Current: 185mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 256K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 706-1093; IS61LF25636A-7.5TQLI

IS61/64LF25636A IS61LF51218A IS61VF25636A IS61VF51218A
119 BGA BOUNDARY SCAN ORDER (512K x 18)
Integrated Silicon Solution, Inc.
Rev. H
07/22/2010
119 BGA BOUNDARY SCAN ORDER (256K x 36)
1
2
3
4
5
6
7
8
9
10
11
12
13
B it # Name
B it # Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Signal Bump
Signal Bump
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQb
ZZ
ZZ
A
A
A
A
A
A
A
A
A
A
A
A
A
A
2R
6R
3B
5B
7P
6N
7K
6H
2T
3T
5T
6L
7T
6M
ID
2R
6R
3B
5B
6P
7N
6K
7P
6N
7K
6H
3T
4T
5T
7L
6L
7T
ID
Bit # Name
Bit # Name
14
15
16
17
18
19
20
21
22
23
24
25
26
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Signal Bump
ADSC
ADSP
Signal Bump
ADSC
ADSP
BWE
DQa
DQa
DQa
DQa
ADV
BWE
GW
DQb
DQb
DQb
DQb
DQb
DQb
DQb
DQb
ADV
CLK
OE
GW
OE
A
A
A
A
A
A
4M
7G
7E
6D
6A
5A
4G
4A
4B
4H
6F
6T
4F
4M
ID
7G
7D
7H
6G
6D
4G
4H
6F
7E
6E
6A
5A
4A
4B
4F
4K
6B
ID
Bit # Name
Bit # Name
27
28
29
30
31
32
33
34
35
36
37
38
39
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
Signal Bump
Signal Bump
BWa
BWb
DQb
DQb
DQb
DQb
CLK
CE2
BWb
BWd
BWa
BWc
CE2
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQc
CE
NC
CE
NC
A
A
A
A
A
3G
1D
2G
1H
5R
4K
6B
5L
2B
4E
3A
2A
2E
ID
5G
3G
2D
1G
2H
1D
2G
1H
5R
2B
4E
3A
2A
1E
2F
2E
ID
5L
3L
Bit # Name
Bit # Name
40
41
42
43
44
45
46
47
48
49
50
51
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Signal Bump
MODE
Signal Bump
MODE
DQb
DQb
DQb
DQb
DQb
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQd
A1
A0
A1
A0
A
A
A
A
A
A
A
A
2M
1N
3R
2C
3C
5C
6C
4N
2K
1L
2P
4P
2M
ID
1N
2N
3R
2C
3C
5C
6C
4N
2K
1P
1K
2P
4P
1L
2L
ID
25