XRT83VSH28ES Exar, XRT83VSH28ES Datasheet - Page 69

• Manufacturer Part Number: XRT83VSH28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH (low cost version)
• Manufacturer: Exar

Specifications of XRT83VSH28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 2.0.0
B
B
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
IT
IT
chUPDATE LCV Counter Update Per Channel
LCVCNT7
LCVCNT6
LCVCNT5
LCVCNT4
LCVCNT3
LCVCNT2
LCVCNT1
LCVCNT0
chRESET
BYTEsel
N
N
AME
AME
T
T
ABLE
ABLE
LCV Counter Byte Select
This bit is used to select the MSB or LSB for Reading the contents
of the LCV counter for a given channel. The channel is addressed
by using bits D[3:0] in register 0x8Ch. By default, the LSB byte is
selected.
0 = Low Byte
1 = High Byte
This bit is used to latch the contents of the counter for a given
channel into a holding register so that the value of the counter can
be read. The channel is addressed by using bits D[3:0] in register
0x8Ch.
0 = Normal Operation
1 = Updates the Selected Channel
LCV Counter Reset Per Channel
This bit is used to reset the LCV counter of a given channel to its
default state 0000h. The channel is addressed by using bits D[3:0]
in register 0x8Ch. This bit must be set to "1" for 1  S.
0 = Normal Operation
1 = Resets the Selected Channel
Line Code Violation Byte Contents
These bits contain the LCV counter contents of the Byte selected
by bit D2 in register 0x8Dh for a given channel. The channel is
addressed by using bits D[3:0] in register 0x8Ch. By default, the
contents contain the LSB, however no channel is selected..
34: M
35: M
ICROPROCESSOR
ICROPROCESSOR
G
G
LOBAL
LOBAL
R
F
R
F
UNCTION
UNCTION
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
EGISTER
EGISTER
R
R
66
EGISTER
EGISTER
(0
(0
X
X
8D
8E
0
0
X
X
8D
H
H
8E
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
Type
Type
R/W
R/W
R/W
R/W
XRT83VSH28
(HW reset)
(HW reset)
Default
Default
Value
Value
0
0
0
0
0
0
0
0
0
0
0